IT7822112A0 - Metodo per formare un contatto per un circuito integrato. - Google Patents

Metodo per formare un contatto per un circuito integrato.

Info

Publication number
IT7822112A0
IT7822112A0 IT7822112A IT2211278A IT7822112A0 IT 7822112 A0 IT7822112 A0 IT 7822112A0 IT 7822112 A IT7822112 A IT 7822112A IT 2211278 A IT2211278 A IT 2211278A IT 7822112 A0 IT7822112 A0 IT 7822112A0
Authority
IT
Italy
Prior art keywords
forming
contact
integrated circuit
integrated
circuit
Prior art date
Application number
IT7822112A
Other languages
English (en)
Original Assignee
Rca Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rca Corp filed Critical Rca Corp
Publication of IT7822112A0 publication Critical patent/IT7822112A0/it

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
    • H01L21/743—Making of internal connections, substrate contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS
    • H01L21/823871—Complementary field-effect transistors, e.g. CMOS interconnection or wiring or contact manufacturing related aspects

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
IT7822112A 1977-04-11 1978-04-07 Metodo per formare un contatto per un circuito integrato. IT7822112A0 (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/786,246 US4081896A (en) 1977-04-11 1977-04-11 Method of making a substrate contact for an integrated circuit

Publications (1)

Publication Number Publication Date
IT7822112A0 true IT7822112A0 (it) 1978-04-07

Family

ID=25138044

Family Applications (1)

Application Number Title Priority Date Filing Date
IT7822112A IT7822112A0 (it) 1977-04-11 1978-04-07 Metodo per formare un contatto per un circuito integrato.

Country Status (6)

Country Link
US (2) US4081896A (it)
JP (1) JPS53136959A (it)
DE (1) DE2814695A1 (it)
FR (1) FR2387515A1 (it)
IT (1) IT7822112A0 (it)
SE (1) SE7803105L (it)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4272303A (en) * 1978-06-05 1981-06-09 Texas Instruments Incorporated Method of making post-metal ion beam programmable MOS read only memory
JPS5529116A (en) * 1978-08-23 1980-03-01 Hitachi Ltd Manufacture of complementary misic
JPS6055988B2 (ja) * 1979-01-26 1985-12-07 株式会社日立製作所 半導体装置の製法
JPS5599722A (en) * 1979-01-26 1980-07-30 Hitachi Ltd Preparation of semiconductor device
JPS567463A (en) * 1979-06-29 1981-01-26 Hitachi Ltd Semiconductor device and its manufacture
US4274193A (en) * 1979-07-05 1981-06-23 Rca Corporation Method for making a closed gate MOS transistor with self-aligned contacts
US4272881A (en) * 1979-07-20 1981-06-16 Rca Corporation Method for making a closed gate MOS transistor with self-aligned contacts with dual passivation layer
US4306916A (en) * 1979-09-20 1981-12-22 American Microsystems, Inc. CMOS P-Well selective implant method
US5414283A (en) * 1993-11-19 1995-05-09 Ois Optical Imaging Systems, Inc. TFT with reduced parasitic capacitance
US6300661B1 (en) * 1998-04-14 2001-10-09 Advanced Micro Devices, Inc. Mutual implant region used for applying power/ground to a source of a transistor and a well of a substrate
US20020132395A1 (en) * 2001-03-16 2002-09-19 International Business Machines Corporation Body contact in SOI devices by electrically weakening the oxide under the body
US7135951B1 (en) * 2003-07-15 2006-11-14 Altera Corporation Integrated circuit inductors

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3440500A (en) * 1966-09-26 1969-04-22 Itt High frequency field effect transistor
US3679492A (en) * 1970-03-23 1972-07-25 Ibm Process for making mosfet's
GB1357515A (en) * 1972-03-10 1974-06-26 Matsushita Electronics Corp Method for manufacturing an mos integrated circuit
US3931634A (en) * 1973-06-14 1976-01-06 Rca Corporation Junction-isolated monolithic integrated circuit device with means for preventing parasitic transistor action
IN144541B (it) * 1975-06-11 1978-05-13 Rca Corp
US4050965A (en) * 1975-10-21 1977-09-27 The United States Of America As Represented By The Secretary Of The Air Force Simultaneous fabrication of CMOS transistors and bipolar devices

Also Published As

Publication number Publication date
FR2387515A1 (fr) 1978-11-10
DE2814695A1 (de) 1978-10-19
JPS53136959A (en) 1978-11-29
SE7803105L (sv) 1978-10-12
US4081896A (en) 1978-04-04
US4159561A (en) 1979-07-03

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