IT1320025B1 - SUPPORT OF THE PRINTED CIRCUIT TYPE FOR INTEGRATED ELECTRONIC CIRCUITS, PROCEDURE FOR ITS MANUFACTURE, AND COMPONENT - Google Patents
SUPPORT OF THE PRINTED CIRCUIT TYPE FOR INTEGRATED ELECTRONIC CIRCUITS, PROCEDURE FOR ITS MANUFACTURE, AND COMPONENTInfo
- Publication number
- IT1320025B1 IT1320025B1 IT2000TO000334A ITTO20000334A IT1320025B1 IT 1320025 B1 IT1320025 B1 IT 1320025B1 IT 2000TO000334 A IT2000TO000334 A IT 2000TO000334A IT TO20000334 A ITTO20000334 A IT TO20000334A IT 1320025 B1 IT1320025 B1 IT 1320025B1
- Authority
- IT
- Italy
- Prior art keywords
- procedure
- manufacture
- component
- support
- printed circuit
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/241—Reinforcing the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus
- H05K3/242—Reinforcing the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus characterised by using temporary conductors on the printed circuit for electrically connecting areas which are to be electroplated
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/09036—Recesses or grooves in insulating substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/0959—Plated through-holes or plated blind vias filled with insulating material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
- H05K2203/0228—Cutting, sawing, milling or shearing
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/05—Patterning and lithography; Masks; Details of resist
- H05K2203/0562—Details of resist
- H05K2203/0571—Dual purpose resist, e.g. etch resist used as solder resist, solder resist used as plating resist
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/16—Inspection; Monitoring; Aligning
- H05K2203/162—Testing a finished product, e.g. heat cycle testing of solder joints
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
- H05K3/0052—Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
- H05K3/061—Etching masks
- H05K3/064—Photoresists
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Ceramic Engineering (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Credit Cards Or The Like (AREA)
- Wire Bonding (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT2000TO000334A IT1320025B1 (en) | 2000-04-10 | 2000-04-10 | SUPPORT OF THE PRINTED CIRCUIT TYPE FOR INTEGRATED ELECTRONIC CIRCUITS, PROCEDURE FOR ITS MANUFACTURE, AND COMPONENT |
PCT/IT2001/000177 WO2001078140A2 (en) | 2000-04-10 | 2001-04-09 | Chip carrier, relative manufacturing process, and electronic component incorporating such a carrier |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT2000TO000334A IT1320025B1 (en) | 2000-04-10 | 2000-04-10 | SUPPORT OF THE PRINTED CIRCUIT TYPE FOR INTEGRATED ELECTRONIC CIRCUITS, PROCEDURE FOR ITS MANUFACTURE, AND COMPONENT |
Publications (3)
Publication Number | Publication Date |
---|---|
ITTO20000334A0 ITTO20000334A0 (en) | 2000-04-10 |
ITTO20000334A1 ITTO20000334A1 (en) | 2001-10-10 |
IT1320025B1 true IT1320025B1 (en) | 2003-11-12 |
Family
ID=11457657
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT2000TO000334A IT1320025B1 (en) | 2000-04-10 | 2000-04-10 | SUPPORT OF THE PRINTED CIRCUIT TYPE FOR INTEGRATED ELECTRONIC CIRCUITS, PROCEDURE FOR ITS MANUFACTURE, AND COMPONENT |
Country Status (2)
Country | Link |
---|---|
IT (1) | IT1320025B1 (en) |
WO (1) | WO2001078140A2 (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1381260A1 (en) * | 2002-07-11 | 2004-01-14 | Ultratera Corporation | Method of plating connecting layers on a conductor pattern of a printed circuit board (PCB) |
EP1381259A1 (en) * | 2002-07-11 | 2004-01-14 | Ultratera Corporation | Structure of printed circuit board (PCB) |
US7488620B2 (en) | 2005-12-29 | 2009-02-10 | Sandisk Corporation | Method of fabricating leadframe based flash memory cards including singulation by straight line cuts |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4551788A (en) * | 1984-10-04 | 1985-11-05 | Daniel Robert P | Multi-chip carrier array |
DE3817600C2 (en) * | 1987-05-26 | 1994-06-23 | Matsushita Electric Works Ltd | Method of manufacturing a semiconductor device with a ceramic substrate and an integrated circuit |
US5652185A (en) * | 1995-04-07 | 1997-07-29 | National Semiconductor Corporation | Maximized substrate design for grid array based assemblies |
US6140708A (en) * | 1996-05-17 | 2000-10-31 | National Semiconductor Corporation | Chip scale package and method for manufacture thereof |
US5783866A (en) * | 1996-05-17 | 1998-07-21 | National Semiconductor Corporation | Low cost ball grid array device and method of manufacture thereof |
US6177722B1 (en) * | 1998-04-21 | 2001-01-23 | Atmel Corporation | Leadless array package |
-
2000
- 2000-04-10 IT IT2000TO000334A patent/IT1320025B1/en active
-
2001
- 2001-04-09 WO PCT/IT2001/000177 patent/WO2001078140A2/en active Application Filing
Also Published As
Publication number | Publication date |
---|---|
ITTO20000334A1 (en) | 2001-10-10 |
WO2001078140A3 (en) | 2002-02-07 |
WO2001078140A2 (en) | 2001-10-18 |
ITTO20000334A0 (en) | 2000-04-10 |
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