IT1277948B1 - Perfezionamento relativo alla lavorazione di semiconduttori - Google Patents

Perfezionamento relativo alla lavorazione di semiconduttori

Info

Publication number
IT1277948B1
IT1277948B1 IT95RM000829A ITRM950829A IT1277948B1 IT 1277948 B1 IT1277948 B1 IT 1277948B1 IT 95RM000829 A IT95RM000829 A IT 95RM000829A IT RM950829 A ITRM950829 A IT RM950829A IT 1277948 B1 IT1277948 B1 IT 1277948B1
Authority
IT
Italy
Prior art keywords
semiconductors
processing
improvement relating
relating
improvement
Prior art date
Application number
IT95RM000829A
Other languages
English (en)
Inventor
Luigi Auzino
Agostino Cangiano
Original Assignee
Texas Instruments Italia Spa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Italia Spa filed Critical Texas Instruments Italia Spa
Priority to IT95RM000829A priority Critical patent/IT1277948B1/it
Publication of ITRM950829A0 publication Critical patent/ITRM950829A0/it
Priority to JP8359605A priority patent/JPH09306801A/ja
Priority to EP96830636A priority patent/EP0780886B1/en
Priority to US08/769,247 priority patent/US5960296A/en
Priority to DE1996626477 priority patent/DE69626477T2/de
Publication of ITRM950829A1 publication Critical patent/ITRM950829A1/it
Application granted granted Critical
Publication of IT1277948B1 publication Critical patent/IT1277948B1/it
Priority to JP2007174403A priority patent/JP4358263B2/ja

Links

Classifications

    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F9/00Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
    • G03F9/70Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
    • G03F9/7073Alignment marks and their environment
    • G03F9/708Mark formation
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F9/00Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
    • G03F9/70Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F9/00Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
    • G03F9/70Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
    • G03F9/7003Alignment type or strategy, e.g. leveling, global alignment
    • G03F9/7046Strategy, e.g. mark, sensor or wavelength selection
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F9/00Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
    • G03F9/70Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
    • G03F9/7073Alignment marks and their environment
    • G03F9/7076Mark details, e.g. phase grating mark, temporary mark
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F9/00Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
    • G03F9/70Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
    • G03F9/7073Alignment marks and their environment
    • G03F9/7084Position of mark on substrate, i.e. position in (x, y, z) of mark, e.g. buried or resist covered mark, mark on rearside, at the substrate edge, in the circuit area, latent image mark, marks in plural levels
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
IT95RM000829A 1995-12-18 1995-12-18 Perfezionamento relativo alla lavorazione di semiconduttori IT1277948B1 (it)

Priority Applications (6)

Application Number Priority Date Filing Date Title
IT95RM000829A IT1277948B1 (it) 1995-12-18 1995-12-18 Perfezionamento relativo alla lavorazione di semiconduttori
JP8359605A JPH09306801A (ja) 1995-12-18 1996-12-18 半導体処理及びその改良
EP96830636A EP0780886B1 (en) 1995-12-18 1996-12-18 Method of aligning layers in a semiconductor device
US08/769,247 US5960296A (en) 1995-12-18 1996-12-18 Method for aligning the device layers in a semiconductor device
DE1996626477 DE69626477T2 (de) 1995-12-18 1996-12-18 Verfahren zum Ausrichten von Schichten in einem Halbleiterbauelement
JP2007174403A JP4358263B2 (ja) 1995-12-18 2007-07-02 半導体ウエハ上に半導体デバイスを形成する方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
IT95RM000829A IT1277948B1 (it) 1995-12-18 1995-12-18 Perfezionamento relativo alla lavorazione di semiconduttori
US08/769,247 US5960296A (en) 1995-12-18 1996-12-18 Method for aligning the device layers in a semiconductor device

Publications (3)

Publication Number Publication Date
ITRM950829A0 ITRM950829A0 (it) 1995-12-18
ITRM950829A1 ITRM950829A1 (it) 1997-06-18
IT1277948B1 true IT1277948B1 (it) 1997-11-12

Family

ID=26332091

Family Applications (1)

Application Number Title Priority Date Filing Date
IT95RM000829A IT1277948B1 (it) 1995-12-18 1995-12-18 Perfezionamento relativo alla lavorazione di semiconduttori

Country Status (4)

Country Link
US (1) US5960296A (it)
EP (1) EP0780886B1 (it)
JP (1) JPH09306801A (it)
IT (1) IT1277948B1 (it)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6465322B2 (en) * 1998-01-15 2002-10-15 Koninklijke Philips Electronics N.V. Semiconductor processing methods and structures for determining alignment during semiconductor wafer processing
US6162314A (en) * 1998-09-29 2000-12-19 Alliant Techsystems Inc. Thermal welding of fiber reinforced thermoplastic prepreg
US20030002043A1 (en) 2001-04-10 2003-01-02 Kla-Tencor Corporation Periodic patterns and technique to control misalignment
US7406901B2 (en) * 2001-12-20 2008-08-05 Kimberly Clark Worldwide, Inc. Auto sheet threading and cutting device and method
US6815232B2 (en) * 2002-11-26 2004-11-09 Advanced Micro Devices, Inc. Method and apparatus for overlay control using multiple targets
DE10258420B4 (de) * 2002-12-13 2007-03-01 Infineon Technologies Ag Verfahren zur Herstellung einer Halbleiterspeichereinrichtung mit Charge-trapping-Speicherzellen und vergrabenen Bitleitungen
US7830028B2 (en) * 2007-06-30 2010-11-09 Sandisk Corporation Semiconductor test structures
US7998640B2 (en) * 2007-06-30 2011-08-16 Sandisk Corporation Mask reuse in semiconductor processing
US7932157B2 (en) * 2007-06-30 2011-04-26 Sandisk Corporation Test structure formation in semiconductor processing
NL2007216A (en) 2010-09-08 2012-03-12 Asml Netherlands Bv Self-referencing interferometer, alignment system, and lithographic apparatus.

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02246314A (ja) * 1989-03-20 1990-10-02 Fujitsu Ltd パターン作成方法
JP3229118B2 (ja) * 1993-04-26 2001-11-12 三菱電機株式会社 積層型半導体装置のパターン形成方法
FR2704660B1 (fr) * 1993-04-27 1995-07-13 Sgs Thomson Microelectronics Masques pour une machine d'insolation double face.
JPH07249558A (ja) * 1994-03-09 1995-09-26 Nikon Corp 位置合わせ方法

Also Published As

Publication number Publication date
JPH09306801A (ja) 1997-11-28
ITRM950829A0 (it) 1995-12-18
EP0780886A1 (en) 1997-06-25
ITRM950829A1 (it) 1997-06-18
US5960296A (en) 1999-09-28
EP0780886B1 (en) 2003-03-05

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Legal Events

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0001 Granted