IT1244207B - System and circuit for estimating the error signal in the adjustment of the matching equalizer in digital radio links - Google Patents

System and circuit for estimating the error signal in the adjustment of the matching equalizer in digital radio links

Info

Publication number
IT1244207B
IT1244207B IT02244590A IT2244590A IT1244207B IT 1244207 B IT1244207 B IT 1244207B IT 02244590 A IT02244590 A IT 02244590A IT 2244590 A IT2244590 A IT 2244590A IT 1244207 B IT1244207 B IT 1244207B
Authority
IT
Italy
Prior art keywords
equalizer
adjustment
circuit
error signal
estimating
Prior art date
Application number
IT02244590A
Other languages
Italian (it)
Other versions
IT9022445A0 (en
IT9022445A1 (en
Inventor
Maurizio Bolla
Franco Guglielmi
Arnaldo Spalvieri
Original Assignee
Telettra Spa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telettra Spa filed Critical Telettra Spa
Priority to IT02244590A priority Critical patent/IT1244207B/en
Publication of IT9022445A0 publication Critical patent/IT9022445A0/en
Publication of IT9022445A1 publication Critical patent/IT9022445A1/en
Application granted granted Critical
Publication of IT1244207B publication Critical patent/IT1244207B/en

Links

Abstract

The present invention relates to a system for estimating the error signal required for adjusting the matching equalizer in digital radio links, for modulated signals QAM, in which the following are produced: A) an estimate of the modulus of the transmitted data element and B) an estimate of the error based on the estimate A) and on the signal at the output of the equalizer. The invention also comprises an estimator of the transmitted data, and a circuit which produces the error signal required for the adjustment of the equalizer. In one embodiment, the estimator of the transmitted data is implemented in the form of a power elevator, adders and comparators, while the circuit which produces the signal required for the adjustment of the equalizer is implemented in the form of power elevators, multipliers and adders. <IMAGE>
IT02244590A 1990-12-19 1990-12-19 System and circuit for estimating the error signal in the adjustment of the matching equalizer in digital radio links IT1244207B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
IT02244590A IT1244207B (en) 1990-12-19 1990-12-19 System and circuit for estimating the error signal in the adjustment of the matching equalizer in digital radio links

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT02244590A IT1244207B (en) 1990-12-19 1990-12-19 System and circuit for estimating the error signal in the adjustment of the matching equalizer in digital radio links

Publications (3)

Publication Number Publication Date
IT9022445A0 IT9022445A0 (en) 1990-12-19
IT9022445A1 IT9022445A1 (en) 1992-06-19
IT1244207B true IT1244207B (en) 1994-07-08

Family

ID=11196384

Family Applications (1)

Application Number Title Priority Date Filing Date
IT02244590A IT1244207B (en) 1990-12-19 1990-12-19 System and circuit for estimating the error signal in the adjustment of the matching equalizer in digital radio links

Country Status (1)

Country Link
IT (1) IT1244207B (en)

Also Published As

Publication number Publication date
IT9022445A0 (en) 1990-12-19
IT9022445A1 (en) 1992-06-19

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Legal Events

Date Code Title Description
0001 Granted
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19971128