IT1240103B - Circuito di protezione mos-bip compatibile con la tecnologia cmos std 2 um. - Google Patents

Circuito di protezione mos-bip compatibile con la tecnologia cmos std 2 um.

Info

Publication number
IT1240103B
IT1240103B IT47985A IT4798590A IT1240103B IT 1240103 B IT1240103 B IT 1240103B IT 47985 A IT47985 A IT 47985A IT 4798590 A IT4798590 A IT 4798590A IT 1240103 B IT1240103 B IT 1240103B
Authority
IT
Italy
Prior art keywords
bip
std
mos
cmos
technology
Prior art date
Application number
IT47985A
Other languages
English (en)
Other versions
IT9047985A0 (it
IT9047985A1 (it
Inventor
Giulio Marotta
Original Assignee
Texas Instruments Italia Spa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Italia Spa filed Critical Texas Instruments Italia Spa
Priority to IT47985A priority Critical patent/IT1240103B/it
Publication of IT9047985A0 publication Critical patent/IT9047985A0/it
Priority to EP91830206A priority patent/EP0457737B1/en
Priority to DE69123170T priority patent/DE69123170T2/de
Publication of IT9047985A1 publication Critical patent/IT9047985A1/it
Application granted granted Critical
Publication of IT1240103B publication Critical patent/IT1240103B/it

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0259—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using bipolar transistors as protective elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0266—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Amplifiers (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
IT47985A 1990-05-18 1990-05-18 Circuito di protezione mos-bip compatibile con la tecnologia cmos std 2 um. IT1240103B (it)

Priority Applications (3)

Application Number Priority Date Filing Date Title
IT47985A IT1240103B (it) 1990-05-18 1990-05-18 Circuito di protezione mos-bip compatibile con la tecnologia cmos std 2 um.
EP91830206A EP0457737B1 (en) 1990-05-18 1991-05-17 MOS/BIP protection circuit
DE69123170T DE69123170T2 (de) 1990-05-18 1991-05-17 MOS/BIP-Schutzschaltung

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT47985A IT1240103B (it) 1990-05-18 1990-05-18 Circuito di protezione mos-bip compatibile con la tecnologia cmos std 2 um.

Publications (3)

Publication Number Publication Date
IT9047985A0 IT9047985A0 (it) 1990-05-18
IT9047985A1 IT9047985A1 (it) 1991-11-18
IT1240103B true IT1240103B (it) 1993-11-27

Family

ID=11263795

Family Applications (1)

Application Number Title Priority Date Filing Date
IT47985A IT1240103B (it) 1990-05-18 1990-05-18 Circuito di protezione mos-bip compatibile con la tecnologia cmos std 2 um.

Country Status (3)

Country Link
EP (1) EP0457737B1 (it)
DE (1) DE69123170T2 (it)
IT (1) IT1240103B (it)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3755675B2 (ja) * 1995-11-20 2006-03-15 ソニー株式会社 クランプ回路、ｃｍｏｓチツプｉｃ及び非接触型情報カード
SG10201610403YA (en) * 2016-12-12 2018-07-30 Huawei Int Pte Ltd System and method for transmitting a wi-fi or a bluetooth signal using a shared transmitter

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3407339A (en) * 1966-05-02 1968-10-22 North American Rockwell Voltage protection device utilizing a field effect transistor
FR2512598A1 (fr) * 1981-09-09 1983-03-11 Texas Instruments France Circuit pour proteger un circuit integre contre les surtensions
JPS5961169A (ja) * 1982-09-30 1984-04-07 Fujitsu Ltd 半導体装置
FR2630867B1 (fr) * 1988-04-29 1995-03-24 Sgs Thomson Microelectronics Circuit-integre protege contre les decharges electrostatiques
DE58906972D1 (de) * 1988-08-16 1994-03-24 Siemens Ag Bipolartransistor als Schutzelement für integrierte Schaltungen.
EP0401410B1 (de) * 1989-06-08 1993-12-29 Siemens Aktiengesellschaft Schaltungsanordnung zum Schutz elektronischer Schaltungen vor Überspannung

Also Published As

Publication number Publication date
DE69123170D1 (de) 1997-01-02
EP0457737A3 (en) 1992-09-23
DE69123170T2 (de) 1997-04-03
IT9047985A0 (it) 1990-05-18
EP0457737B1 (en) 1996-11-20
EP0457737A2 (en) 1991-11-21
IT9047985A1 (it) 1991-11-18

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Legal Events

Date Code Title Description
0001 Granted
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19960411