IT1213232B - Dispositivo elettronico integrato a tre terminali con corrente di uscita annulantesi sostanzialmente al superamento di un determinato valore della tensione applicata. - Google Patents

Dispositivo elettronico integrato a tre terminali con corrente di uscita annulantesi sostanzialmente al superamento di un determinato valore della tensione applicata.

Info

Publication number
IT1213232B
IT1213232B IT8423300A IT2330084A IT1213232B IT 1213232 B IT1213232 B IT 1213232B IT 8423300 A IT8423300 A IT 8423300A IT 2330084 A IT2330084 A IT 2330084A IT 1213232 B IT1213232 B IT 1213232B
Authority
IT
Italy
Prior art keywords
exceeded
electronic device
output current
applied voltage
determined value
Prior art date
Application number
IT8423300A
Other languages
English (en)
Other versions
IT8423300A0 (it
Inventor
Franco Bertotti
Sandro Storti
Flavio Villa
Original Assignee
Ates Componenti Elettron
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ates Componenti Elettron filed Critical Ates Componenti Elettron
Priority to IT8423300A priority Critical patent/IT1213232B/it
Publication of IT8423300A0 publication Critical patent/IT8423300A0/it
Priority to GB08525753A priority patent/GB2166292B/en
Priority to FR858515681A priority patent/FR2572585B1/fr
Priority to DE19853537689 priority patent/DE3537689A1/de
Application granted granted Critical
Publication of IT1213232B publication Critical patent/IT1213232B/it

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/40—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00 with at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of IGFETs with BJTs
    • H10D84/401—Combinations of FETs or IGBTs with BJTs
    • H10D84/403—Combinations of FETs or IGBTs with BJTs and with one or more of diodes, resistors or capacitors
    • H10D84/406—Combinations of FETs or IGBTs with vertical BJTs and with one or more of diodes, resistors or capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/761—PN junctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0107—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0107—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs
    • H10D84/0109—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs the at least one component covered by H10D12/00 or H10D30/00 being a MOS device
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
IT8423300A 1984-10-25 1984-10-25 Dispositivo elettronico integrato a tre terminali con corrente di uscita annulantesi sostanzialmente al superamento di un determinato valore della tensione applicata. IT1213232B (it)

Priority Applications (4)

Application Number Priority Date Filing Date Title
IT8423300A IT1213232B (it) 1984-10-25 1984-10-25 Dispositivo elettronico integrato a tre terminali con corrente di uscita annulantesi sostanzialmente al superamento di un determinato valore della tensione applicata.
GB08525753A GB2166292B (en) 1984-10-25 1985-10-18 Three-terminal integrated electronic device
FR858515681A FR2572585B1 (fr) 1984-10-25 1985-10-22 Dispositif electronique integre a trois bornes, et procede pour sa fabrication
DE19853537689 DE3537689A1 (de) 1984-10-25 1985-10-23 Integriertes elektronisches bauelement mit drei anschluessen

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT8423300A IT1213232B (it) 1984-10-25 1984-10-25 Dispositivo elettronico integrato a tre terminali con corrente di uscita annulantesi sostanzialmente al superamento di un determinato valore della tensione applicata.

Publications (2)

Publication Number Publication Date
IT8423300A0 IT8423300A0 (it) 1984-10-25
IT1213232B true IT1213232B (it) 1989-12-14

Family

ID=11205843

Family Applications (1)

Application Number Title Priority Date Filing Date
IT8423300A IT1213232B (it) 1984-10-25 1984-10-25 Dispositivo elettronico integrato a tre terminali con corrente di uscita annulantesi sostanzialmente al superamento di un determinato valore della tensione applicata.

Country Status (4)

Country Link
DE (1) DE3537689A1 (it)
FR (1) FR2572585B1 (it)
GB (1) GB2166292B (it)
IT (1) IT1213232B (it)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0435541A3 (en) * 1989-12-26 1991-07-31 Motorola Inc. Semiconductor device having internal current limit overvoltage protection
US5358883A (en) * 1992-02-03 1994-10-25 Motorola, Inc. Lateral bipolar transistor

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS553691A (en) * 1978-06-13 1980-01-11 Ibm Integrated circuit having junction field effect transistor
US4441116A (en) * 1981-07-13 1984-04-03 National Semiconductor Corporation Controlling secondary breakdown in bipolar power transistors

Also Published As

Publication number Publication date
FR2572585A1 (fr) 1986-05-02
DE3537689A1 (de) 1986-04-30
IT8423300A0 (it) 1984-10-25
FR2572585B1 (fr) 1990-10-26
GB8525753D0 (en) 1985-11-20
GB2166292A (en) 1986-04-30
GB2166292B (en) 1988-06-08

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Effective date: 19971030