IT1213216B - DOOR LOGIC INVERTER IN TECHNIQUE I PERFECTED AND PROCEDURE FOR ITS MANUFACTURE. - Google Patents
DOOR LOGIC INVERTER IN TECHNIQUE I PERFECTED AND PROCEDURE FOR ITS MANUFACTURE.Info
- Publication number
- IT1213216B IT1213216B IT8422598A IT2259884A IT1213216B IT 1213216 B IT1213216 B IT 1213216B IT 8422598 A IT8422598 A IT 8422598A IT 2259884 A IT2259884 A IT 2259884A IT 1213216 B IT1213216 B IT 1213216B
- Authority
- IT
- Italy
- Prior art keywords
- perfected
- procedure
- manufacture
- technique
- logic inverter
- Prior art date
Links
- 238000000034 method Methods 0.000 title 2
- 238000004519 manufacturing process Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8222—Bipolar technology
- H01L21/8226—Bipolar technology comprising merged transistor logic or integrated injection logic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/761—PN junctions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0214—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
- H01L27/0229—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of bipolar structures
- H01L27/0233—Integrated injection logic structures [I2L]
- H01L27/0237—Integrated injection logic structures [I2L] using vertical injector structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
- H01L29/732—Vertical transistors
- H01L29/7327—Inverse vertical transistors
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT8422598A IT1213216B (en) | 1984-09-10 | 1984-09-10 | DOOR LOGIC INVERTER IN TECHNIQUE I PERFECTED AND PROCEDURE FOR ITS MANUFACTURE. |
GB08521341A GB2164793B (en) | 1984-09-10 | 1985-08-27 | Iil logic inverter and method for the manufacture thereof. |
DE19853531506 DE3531506A1 (en) | 1984-09-10 | 1985-09-04 | LOGIC INVERTER IN IIL TECHNOLOGY AND METHOD FOR THE PRODUCTION THEREOF |
JP60195693A JPS6171660A (en) | 1984-09-10 | 1985-09-04 | Improved iil lock inverter element |
FR8513421A FR2570222A1 (en) | 1984-09-10 | 1985-09-10 | IMPROVED 12L LOGIC INVERTER AND METHOD FOR MANUFACTURING THE SAME |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT8422598A IT1213216B (en) | 1984-09-10 | 1984-09-10 | DOOR LOGIC INVERTER IN TECHNIQUE I PERFECTED AND PROCEDURE FOR ITS MANUFACTURE. |
Publications (2)
Publication Number | Publication Date |
---|---|
IT8422598A0 IT8422598A0 (en) | 1984-09-10 |
IT1213216B true IT1213216B (en) | 1989-12-14 |
Family
ID=11198282
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT8422598A IT1213216B (en) | 1984-09-10 | 1984-09-10 | DOOR LOGIC INVERTER IN TECHNIQUE I PERFECTED AND PROCEDURE FOR ITS MANUFACTURE. |
Country Status (5)
Country | Link |
---|---|
JP (1) | JPS6171660A (en) |
DE (1) | DE3531506A1 (en) |
FR (1) | FR2570222A1 (en) |
GB (1) | GB2164793B (en) |
IT (1) | IT1213216B (en) |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5431872B2 (en) * | 1974-09-06 | 1979-10-09 | ||
JPS5837699B2 (en) * | 1974-12-16 | 1983-08-18 | 三菱電機株式会社 | handmade takiokusouchi |
-
1984
- 1984-09-10 IT IT8422598A patent/IT1213216B/en active
-
1985
- 1985-08-27 GB GB08521341A patent/GB2164793B/en not_active Expired
- 1985-09-04 JP JP60195693A patent/JPS6171660A/en active Pending
- 1985-09-04 DE DE19853531506 patent/DE3531506A1/en not_active Withdrawn
- 1985-09-10 FR FR8513421A patent/FR2570222A1/en active Pending
Also Published As
Publication number | Publication date |
---|---|
GB8521341D0 (en) | 1985-10-02 |
IT8422598A0 (en) | 1984-09-10 |
GB2164793B (en) | 1988-02-24 |
GB2164793A (en) | 1986-03-26 |
FR2570222A1 (en) | 1986-03-14 |
JPS6171660A (en) | 1986-04-12 |
DE3531506A1 (en) | 1986-03-20 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
TA | Fee payment date (situation as of event date), data collected since 19931001 |
Effective date: 19970929 |