IT1209338B - CIRCUIT PROVISION FOR THE TRANSFER OF DATA BETWEEN THE MEMORY OF AN ELECTRONIC PROCESSOR AND THE INTERFACE UNITS OF THE PERIPHERALS CONNECTED TO IT. - Google Patents

CIRCUIT PROVISION FOR THE TRANSFER OF DATA BETWEEN THE MEMORY OF AN ELECTRONIC PROCESSOR AND THE INTERFACE UNITS OF THE PERIPHERALS CONNECTED TO IT.

Info

Publication number
IT1209338B
IT1209338B IT8023659A IT2365980A IT1209338B IT 1209338 B IT1209338 B IT 1209338B IT 8023659 A IT8023659 A IT 8023659A IT 2365980 A IT2365980 A IT 2365980A IT 1209338 B IT1209338 B IT 1209338B
Authority
IT
Italy
Prior art keywords
transfer
memory
data
electronic processor
interface units
Prior art date
Application number
IT8023659A
Other languages
Italian (it)
Other versions
IT8023659A0 (en
Inventor
Chiabrando Giovanni
Landi Mario
Original Assignee
Sits Soc It Telecom Siemens
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sits Soc It Telecom Siemens filed Critical Sits Soc It Telecom Siemens
Priority to IT8023659A priority Critical patent/IT1209338B/en
Publication of IT8023659A0 publication Critical patent/IT8023659A0/en
Priority to FR8113478A priority patent/FR2487549A1/en
Priority to GB8121638A priority patent/GB2084768A/en
Priority to BR8104634A priority patent/BR8104634A/en
Priority to DE19813129296 priority patent/DE3129296A1/en
Application granted granted Critical
Publication of IT1209338B publication Critical patent/IT1209338B/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
IT8023659A 1980-07-24 1980-07-24 CIRCUIT PROVISION FOR THE TRANSFER OF DATA BETWEEN THE MEMORY OF AN ELECTRONIC PROCESSOR AND THE INTERFACE UNITS OF THE PERIPHERALS CONNECTED TO IT. IT1209338B (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
IT8023659A IT1209338B (en) 1980-07-24 1980-07-24 CIRCUIT PROVISION FOR THE TRANSFER OF DATA BETWEEN THE MEMORY OF AN ELECTRONIC PROCESSOR AND THE INTERFACE UNITS OF THE PERIPHERALS CONNECTED TO IT.
FR8113478A FR2487549A1 (en) 1980-07-24 1981-07-09 CIRCUIT ARRANGEMENT FOR RAPID TRANSFER OF DATA BETWEEN THE MEMORY OF AN ELECTRONIC COMPUTER AND THE INTERFACE UNITS OF THE DEVICES CONNECTED THERETO
GB8121638A GB2084768A (en) 1980-07-24 1981-07-14 Circuit arrangement for rapidly exchanging data between the memory of an electronic processor and the interface units of its peripheral units
BR8104634A BR8104634A (en) 1980-07-24 1981-07-20 CIRCUIT ARRANGEMENT
DE19813129296 DE3129296A1 (en) 1980-07-24 1981-07-24 "CIRCUIT FOR THE QUICK TRANSFER OF DATA"

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT8023659A IT1209338B (en) 1980-07-24 1980-07-24 CIRCUIT PROVISION FOR THE TRANSFER OF DATA BETWEEN THE MEMORY OF AN ELECTRONIC PROCESSOR AND THE INTERFACE UNITS OF THE PERIPHERALS CONNECTED TO IT.

Publications (2)

Publication Number Publication Date
IT8023659A0 IT8023659A0 (en) 1980-07-24
IT1209338B true IT1209338B (en) 1989-07-16

Family

ID=11208952

Family Applications (1)

Application Number Title Priority Date Filing Date
IT8023659A IT1209338B (en) 1980-07-24 1980-07-24 CIRCUIT PROVISION FOR THE TRANSFER OF DATA BETWEEN THE MEMORY OF AN ELECTRONIC PROCESSOR AND THE INTERFACE UNITS OF THE PERIPHERALS CONNECTED TO IT.

Country Status (5)

Country Link
BR (1) BR8104634A (en)
DE (1) DE3129296A1 (en)
FR (1) FR2487549A1 (en)
GB (1) GB2084768A (en)
IT (1) IT1209338B (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3241376A1 (en) * 1982-11-09 1984-05-10 Siemens AG, 1000 Berlin und 8000 München DMA CONTROL DEVICE FOR TRANSMITTING DATA BETWEEN A DATA TRANSMITTER AND A DATA RECEIVER
US5241661A (en) * 1987-03-27 1993-08-31 International Business Machines Corporation DMA access arbitration device in which CPU can arbitrate on behalf of attachment having no arbiter
US4901234A (en) * 1987-03-27 1990-02-13 International Business Machines Corporation Computer system having programmable DMA control
JP2550496B2 (en) * 1989-03-30 1996-11-06 三菱電機株式会社 DMA controller

Also Published As

Publication number Publication date
BR8104634A (en) 1982-04-06
IT8023659A0 (en) 1980-07-24
FR2487549A1 (en) 1982-01-29
GB2084768A (en) 1982-04-15
DE3129296A1 (en) 1982-03-04

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