IT1166699B - Apparecchiatura per l'indirizzamento di memorie ad alta densita' di celle - Google Patents
Apparecchiatura per l'indirizzamento di memorie ad alta densita' di celleInfo
- Publication number
- IT1166699B IT1166699B IT21030/79A IT2103079A IT1166699B IT 1166699 B IT1166699 B IT 1166699B IT 21030/79 A IT21030/79 A IT 21030/79A IT 2103079 A IT2103079 A IT 2103079A IT 1166699 B IT1166699 B IT 1166699B
- Authority
- IT
- Italy
- Prior art keywords
- high density
- density cell
- cell memories
- addressing high
- addressing
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/35—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices with charge storage in a depletion layer, e.g. charge coupled devices
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4097—Bit-line organisation, e.g. bit-line layout, folded bit lines
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Dram (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US05/892,605 US4160275A (en) | 1978-04-03 | 1978-04-03 | Accessing arrangement for memories with small cells |
Publications (2)
Publication Number | Publication Date |
---|---|
IT7921030A0 IT7921030A0 (it) | 1979-03-16 |
IT1166699B true IT1166699B (it) | 1987-05-06 |
Family
ID=25400218
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT21030/79A IT1166699B (it) | 1978-04-03 | 1979-03-16 | Apparecchiatura per l'indirizzamento di memorie ad alta densita' di celle |
Country Status (5)
Country | Link |
---|---|
US (1) | US4160275A (it) |
EP (1) | EP0004557B1 (it) |
JP (1) | JPS5916355B2 (it) |
DE (1) | DE2961587D1 (it) |
IT (1) | IT1166699B (it) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2919166C2 (de) * | 1978-05-12 | 1986-01-02 | Nippon Electric Co., Ltd., Tokio/Tokyo | Speichervorrichtung |
DE2842547A1 (de) * | 1978-09-29 | 1980-04-10 | Siemens Ag | Schaltungsanordnung zum lesen und regenerieren von in ein-transistor-speicherelementen gespeicherten informationen |
JPS5683891A (en) * | 1979-12-13 | 1981-07-08 | Fujitsu Ltd | Semiconductor storage device |
US4287576A (en) * | 1980-03-26 | 1981-09-01 | International Business Machines Corporation | Sense amplifying system for memories with small cells |
US4301519A (en) * | 1980-05-02 | 1981-11-17 | International Business Machines Corporation | Sensing technique for memories with small cells |
JPS57111061A (en) * | 1980-12-26 | 1982-07-10 | Fujitsu Ltd | Semiconductor memory unit |
JPS57208691A (en) * | 1981-06-15 | 1982-12-21 | Mitsubishi Electric Corp | Semiconductor memory |
US4445201A (en) * | 1981-11-30 | 1984-04-24 | International Business Machines Corporation | Simple amplifying system for a dense memory array |
US4636988A (en) * | 1985-01-07 | 1987-01-13 | Thomson Components-Mostek Corporation | CMOS memory arrangement with reduced data line compacitance |
US4627031A (en) * | 1985-01-07 | 1986-12-02 | Thomson Components-Mostek Corporation | CMOS memory arrangement |
JPS6245951U (it) * | 1985-09-09 | 1987-03-20 | ||
JP2633645B2 (ja) * | 1988-09-13 | 1997-07-23 | 株式会社東芝 | 半導体メモリ装置 |
US5010524A (en) * | 1989-04-20 | 1991-04-23 | International Business Machines Corporation | Crosstalk-shielded-bit-line dram |
US5392241A (en) * | 1993-12-10 | 1995-02-21 | International Business Machines Corporation | Semiconductor memory circuit with block overwrite |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2204550C3 (de) * | 1972-02-01 | 1975-05-28 | Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt | Speicherschaltung |
US3760381A (en) * | 1972-06-30 | 1973-09-18 | Ibm | Stored charge memory detection circuit |
US3949381A (en) * | 1974-07-23 | 1976-04-06 | International Business Machines Corporation | Differential charge transfer sense amplifier |
US3992703A (en) * | 1974-10-09 | 1976-11-16 | Rockwell International Corporation | Memory output circuit |
US3979734A (en) * | 1975-06-16 | 1976-09-07 | International Business Machines Corporation | Multiple element charge storage memory cell |
DE2634089C3 (de) * | 1975-08-11 | 1988-09-08 | Nippon Telegraph And Telephone Corp., Tokio/Tokyo | Schaltungsanordnung zum Erfassen schwacher Signale |
US4069475A (en) * | 1976-04-15 | 1978-01-17 | National Semiconductor Corporation | MOS Dynamic random access memory having an improved sense and restore circuit |
US4103342A (en) * | 1976-06-17 | 1978-07-25 | International Business Machines Corporation | Two-device memory cell with single floating capacitor |
US4053873A (en) * | 1976-06-30 | 1977-10-11 | International Business Machines Corporation | Self-isolating cross-coupled sense amplifier latch circuit |
-
1978
- 1978-04-03 US US05/892,605 patent/US4160275A/en not_active Expired - Lifetime
-
1979
- 1979-02-23 JP JP54019864A patent/JPS5916355B2/ja not_active Expired
- 1979-03-02 DE DE7979100623T patent/DE2961587D1/de not_active Expired
- 1979-03-02 EP EP79100623A patent/EP0004557B1/de not_active Expired
- 1979-03-16 IT IT21030/79A patent/IT1166699B/it active
Also Published As
Publication number | Publication date |
---|---|
EP0004557A1 (de) | 1979-10-17 |
EP0004557B1 (de) | 1981-12-23 |
IT7921030A0 (it) | 1979-03-16 |
JPS54132136A (en) | 1979-10-13 |
US4160275A (en) | 1979-07-03 |
DE2961587D1 (en) | 1982-02-11 |
JPS5916355B2 (ja) | 1984-04-14 |
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