IT1164980B - OPERANDI RECOVERY CONTROL EQUIPMENT - Google Patents

OPERANDI RECOVERY CONTROL EQUIPMENT

Info

Publication number
IT1164980B
IT1164980B IT7920140A IT2014079A IT1164980B IT 1164980 B IT1164980 B IT 1164980B IT 7920140 A IT7920140 A IT 7920140A IT 2014079 A IT2014079 A IT 2014079A IT 1164980 B IT1164980 B IT 1164980B
Authority
IT
Italy
Prior art keywords
operandi
control equipment
recovery control
recovery
equipment
Prior art date
Application number
IT7920140A
Other languages
Italian (it)
Other versions
IT7920140A0 (en
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US05/887,091 external-priority patent/US4189768A/en
Priority claimed from US05/887,095 external-priority patent/US4189772A/en
Priority claimed from US05/887,097 external-priority patent/US4189770A/en
Application filed by Ibm filed Critical Ibm
Publication of IT7920140A0 publication Critical patent/IT7920140A0/en
Application granted granted Critical
Publication of IT1164980B publication Critical patent/IT1164980B/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/04—Addressing variable-length words or parts of words
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0844—Multiple simultaneous or quasi-simultaneous cache accessing
    • G06F12/0855—Overlapped cache accessing, e.g. pipeline
    • G06F12/0859—Overlapped cache accessing, e.g. pipeline with reload from main memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0877—Cache access modes
    • G06F12/0886—Variable-length word access
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30018—Bit or string instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G06F9/30043—LOAD or STORE instructions; Clear instruction
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
    • G06F9/345—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes of multiple operands or results
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3816—Instruction alignment, e.g. cache line crossing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/383—Operand prefetching

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Advance Control (AREA)
IT7920140A 1978-03-16 1979-02-13 OPERANDI RECOVERY CONTROL EQUIPMENT IT1164980B (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US05/887,091 US4189768A (en) 1978-03-16 1978-03-16 Operand fetch control improvement
US05/887,095 US4189772A (en) 1978-03-16 1978-03-16 Operand alignment controls for VFL instructions
US05/887,097 US4189770A (en) 1978-03-16 1978-03-16 Cache bypass control for operand fetches

Publications (2)

Publication Number Publication Date
IT7920140A0 IT7920140A0 (en) 1979-02-13
IT1164980B true IT1164980B (en) 1987-04-22

Family

ID=27420522

Family Applications (1)

Application Number Title Priority Date Filing Date
IT7920140A IT1164980B (en) 1978-03-16 1979-02-13 OPERANDI RECOVERY CONTROL EQUIPMENT

Country Status (4)

Country Link
DE (1) DE2909987A1 (en)
FR (1) FR2423822A1 (en)
GB (1) GB2016752B (en)
IT (1) IT1164980B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3138948C2 (en) * 1981-09-30 1985-04-18 Siemens AG, 1000 Berlin und 8000 München Circuit arrangement for generating byte identifier bits for processing memory operands
BR8406089A (en) * 1983-11-30 1985-09-24 Fujitsu Ltd PROCESS TO CONTROL INTERMEDIATE MEMORY IN DATA PROCESSING DEVICE

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3800292A (en) * 1972-10-05 1974-03-26 Honeywell Inf Systems Variable masking for segmented memory
US3858183A (en) * 1972-10-30 1974-12-31 Amdahl Corp Data processing system and method therefor
US3806888A (en) * 1972-12-04 1974-04-23 Ibm Hierarchial memory system

Also Published As

Publication number Publication date
DE2909987A1 (en) 1979-09-20
GB2016752B (en) 1982-03-10
GB2016752A (en) 1979-09-26
IT7920140A0 (en) 1979-02-13
FR2423822A1 (en) 1979-11-16
FR2423822B1 (en) 1983-08-05

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