IT1124654B - Sistema di memoria tampone per unita' di scambio fra due unita' funzionali e procedimento di messa in opera - Google Patents

Sistema di memoria tampone per unita' di scambio fra due unita' funzionali e procedimento di messa in opera

Info

Publication number
IT1124654B
IT1124654B IT26799/79A IT2679979A IT1124654B IT 1124654 B IT1124654 B IT 1124654B IT 26799/79 A IT26799/79 A IT 26799/79A IT 2679979 A IT2679979 A IT 2679979A IT 1124654 B IT1124654 B IT 1124654B
Authority
IT
Italy
Prior art keywords
units
procedure
buffer memory
memory system
functional units
Prior art date
Application number
IT26799/79A
Other languages
English (en)
Italian (it)
Other versions
IT7926799A0 (it
Inventor
Alain Sylvain Lemaire
Original Assignee
Thomson Csf Mat Tel
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson Csf Mat Tel filed Critical Thomson Csf Mat Tel
Publication of IT7926799A0 publication Critical patent/IT7926799A0/it
Application granted granted Critical
Publication of IT1124654B publication Critical patent/IT1124654B/it

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
    • G06F5/065—Partitioned buffers, e.g. allowing multiple independent queues, bidirectional FIFO's
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2205/00—Indexing scheme relating to group G06F5/00; Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F2205/06—Indexing scheme relating to groups G06F5/06 - G06F5/16
    • G06F2205/067—Bidirectional FIFO, i.e. system allowing data transfer in two directions

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
IT26799/79A 1978-10-27 1979-10-26 Sistema di memoria tampone per unita' di scambio fra due unita' funzionali e procedimento di messa in opera IT1124654B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7830575A FR2440058A1 (fr) 1978-10-27 1978-10-27 Systeme de memoire tampon pour unite d'echange entre deux unites fonctionnelles et procede de mise en oeuvre

Publications (2)

Publication Number Publication Date
IT7926799A0 IT7926799A0 (it) 1979-10-26
IT1124654B true IT1124654B (it) 1986-05-14

Family

ID=9214224

Family Applications (1)

Application Number Title Priority Date Filing Date
IT26799/79A IT1124654B (it) 1978-10-27 1979-10-26 Sistema di memoria tampone per unita' di scambio fra due unita' funzionali e procedimento di messa in opera

Country Status (7)

Country Link
BR (1) BR7906965A (enExample)
ES (1) ES485363A0 (enExample)
FR (1) FR2440058A1 (enExample)
GB (1) GB2039102A (enExample)
GR (1) GR67725B (enExample)
IT (1) IT1124654B (enExample)
PL (1) PL219201A1 (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA1143856A (en) * 1979-09-26 1983-03-29 Anthony K. Fung Circular-queue structure
EP0090137A3 (en) * 1982-03-29 1986-12-03 International Business Machines Corporation Access control system for digital data storage device
DE3424587A1 (de) * 1984-07-04 1986-01-09 Standard Elektrik Lorenz Ag, 7000 Stuttgart Schaltungsanordnung zur steuerung der bidirektionalen datenuebertragung zwischen einer rechnereinheit und ueber ein-/ausgabeeinheiten angeschlossenen uebertragungsleitungen
EP0267974B1 (en) * 1986-11-14 1992-02-19 International Business Machines Corporation Control interface for transferring data between a data processing unit and input/output devices
GB8711991D0 (en) * 1987-05-21 1987-06-24 British Aerospace Asynchronous communication systems
JP2572292B2 (ja) * 1990-05-14 1997-01-16 株式会社小松製作所 非同期データ伝送装置
GB2289146B (en) * 1994-04-12 1998-09-09 Nokia Mobile Phones Ltd Buffering data
US6134607A (en) * 1998-04-03 2000-10-17 Avid Technology, Inc. Method and apparatus for controlling data flow between devices connected by a memory

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3516069A (en) * 1967-08-14 1970-06-02 Collins Radio Co Data character assembler and disassembler
US3766531A (en) * 1972-03-13 1973-10-16 Honeywell Inf Systems Communication line multiplexing apparatus having a main memory and an input/output memory
NL7217127A (enExample) * 1972-12-15 1974-06-18
CH553450A (de) * 1972-12-19 1974-08-30 Hasler Ag Einrichtung zur buchfuehrung ueber die belegung von speicherzellen in einer datenverarbeitenden anlage.

Also Published As

Publication number Publication date
FR2440058B1 (enExample) 1982-11-19
BR7906965A (pt) 1980-09-16
ES8306282A1 (es) 1982-09-01
GR67725B (enExample) 1981-09-15
FR2440058A1 (fr) 1980-05-23
GB2039102A (en) 1980-07-30
PL219201A1 (enExample) 1980-11-17
IT7926799A0 (it) 1979-10-26
ES485363A0 (es) 1982-09-01

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