IT1056807B - Struttura scalare per l elaborazione delle informazioni - Google Patents
Struttura scalare per l elaborazione delle informazioniInfo
- Publication number
- IT1056807B IT1056807B IT20752/76A IT2075276A IT1056807B IT 1056807 B IT1056807 B IT 1056807B IT 20752/76 A IT20752/76 A IT 20752/76A IT 2075276 A IT2075276 A IT 2075276A IT 1056807 B IT1056807 B IT 1056807B
- Authority
- IT
- Italy
- Prior art keywords
- information
- processing
- staircase structure
- staircase
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/76—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data
- G06F7/78—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data for changing the order of data flow, e.g. matrix transposition or LIFO buffers; Overflow or underflow handling therefor
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
- G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
- G06F5/08—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor having a sequence of storage locations, the intermediate ones not being accessible for either enqueue or dequeue operations, e.g. using a shift register
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
- G11C19/02—Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements
- G11C19/08—Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements using thin films in plane structure
- G11C19/0875—Organisation of a plurality of magnetic shift registers
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
- G11C19/02—Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements
- G11C19/08—Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements using thin films in plane structure
- G11C19/0875—Organisation of a plurality of magnetic shift registers
- G11C19/0883—Means for switching magnetic domains from one path into another path, i.e. transfer switches, swap gates or decoders
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
- Digital Magnetic Recording (AREA)
- Numerical Control (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
- Programmable Controllers (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US05/556,378 US4040018A (en) | 1975-03-07 | 1975-03-07 | Ladder for information processing |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| IT1056807B true IT1056807B (it) | 1982-02-20 |
Family
ID=24221103
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| IT20752/76A IT1056807B (it) | 1975-03-07 | 1976-03-01 | Struttura scalare per l elaborazione delle informazioni |
Country Status (15)
| Country | Link |
|---|---|
| US (1) | US4040018A (it) |
| JP (1) | JPS51112238A (it) |
| AU (1) | AU497105B2 (it) |
| BE (1) | BE837995A (it) |
| BR (1) | BR7601392A (it) |
| CA (1) | CA1071762A (it) |
| CH (1) | CH604320A5 (it) |
| DE (1) | DE2607946B2 (it) |
| ES (1) | ES445668A1 (it) |
| FR (1) | FR2303424A1 (it) |
| GB (1) | GB1527914A (it) |
| IT (1) | IT1056807B (it) |
| NL (1) | NL7601359A (it) |
| SE (1) | SE404573B (it) |
| ZA (1) | ZA757848B (it) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4122536A (en) * | 1976-11-05 | 1978-10-24 | International Business Machines Corporation | Self-organizing magnetic bubble lattice file |
| US4194245A (en) * | 1978-03-06 | 1980-03-18 | International Business Machines Corporation | System for randomly accessing a recirculating memory |
| GB2016836B (en) * | 1978-03-15 | 1982-02-10 | Rockwell International Corp | Crossover junction for magnetic bubble domains |
| US4346455A (en) * | 1978-03-15 | 1982-08-24 | Rockwell International Corporation | Crossover junction for magnetic bubble domain circuits |
| US4283771A (en) * | 1978-07-31 | 1981-08-11 | International Business Machines Corporation | On-chip bubble domain relational data base system |
| US4493048A (en) * | 1982-02-26 | 1985-01-08 | Carnegie-Mellon University | Systolic array apparatuses for matrix computations |
| US5036489A (en) * | 1990-04-27 | 1991-07-30 | Codex Corp. | Compact expandable folded first-in-first-out queue |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3638208A (en) * | 1970-06-15 | 1972-01-25 | Bell Telephone Labor Inc | Magnetic domain logic circuit |
| US3770978A (en) * | 1972-06-12 | 1973-11-06 | Bell Canada Northern Electric | Magnetic bubble domain switching device |
| US4117543A (en) * | 1972-08-24 | 1978-09-26 | Monsanto Company | Magnetic bubble logic family |
| US3916397A (en) * | 1973-07-12 | 1975-10-28 | Nippon Electric Co | Circulating access memory device |
-
1975
- 1975-03-07 US US05/556,378 patent/US4040018A/en not_active Expired - Lifetime
- 1975-11-26 GB GB48505/75A patent/GB1527914A/en not_active Expired
- 1975-12-17 ZA ZA757848A patent/ZA757848B/xx unknown
-
1976
- 1976-01-20 FR FR7602211A patent/FR2303424A1/fr active Granted
- 1976-01-28 BE BE163870A patent/BE837995A/xx unknown
- 1976-02-11 NL NL7601359A patent/NL7601359A/xx not_active Application Discontinuation
- 1976-02-18 CH CH197176A patent/CH604320A5/xx not_active IP Right Cessation
- 1976-02-26 SE SE7602482A patent/SE404573B/xx unknown
- 1976-02-27 DE DE2607946A patent/DE2607946B2/de active Granted
- 1976-03-01 ES ES445668A patent/ES445668A1/es not_active Expired
- 1976-03-01 IT IT20752/76A patent/IT1056807B/it active
- 1976-03-05 CA CA247,408A patent/CA1071762A/en not_active Expired
- 1976-03-05 JP JP51023365A patent/JPS51112238A/ja active Pending
- 1976-03-08 AU AU11766/76A patent/AU497105B2/en not_active Expired
- 1976-03-08 BR BR7601392A patent/BR7601392A/pt unknown
Also Published As
| Publication number | Publication date |
|---|---|
| SE7602482L (sv) | 1976-09-08 |
| DE2607946A1 (de) | 1976-10-14 |
| NL7601359A (nl) | 1976-09-09 |
| BE837995A (fr) | 1976-05-14 |
| JPS51112238A (en) | 1976-10-04 |
| AU497105B2 (en) | 1978-11-30 |
| CH604320A5 (it) | 1978-09-15 |
| DE2607946B2 (de) | 1979-08-16 |
| DE2607946C3 (it) | 1980-05-08 |
| FR2303424B1 (it) | 1978-11-10 |
| FR2303424A1 (fr) | 1976-10-01 |
| AU1176676A (en) | 1977-09-15 |
| SE404573B (sv) | 1978-10-09 |
| GB1527914A (en) | 1978-10-11 |
| BR7601392A (pt) | 1976-09-14 |
| ZA757848B (en) | 1977-07-27 |
| ES445668A1 (es) | 1977-06-01 |
| US4040018A (en) | 1977-08-02 |
| CA1071762A (en) | 1980-02-12 |
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