IT1029586B - IMPROVEMENT IN THE SELECTION AND ADDRESSING SYSTEMS OF MEMORY AND D REGISTERS FOR DATA PROCESSING - Google Patents

IMPROVEMENT IN THE SELECTION AND ADDRESSING SYSTEMS OF MEMORY AND D REGISTERS FOR DATA PROCESSING

Info

Publication number
IT1029586B
IT1029586B IT5311374A IT5311374A IT1029586B IT 1029586 B IT1029586 B IT 1029586B IT 5311374 A IT5311374 A IT 5311374A IT 5311374 A IT5311374 A IT 5311374A IT 1029586 B IT1029586 B IT 1029586B
Authority
IT
Italy
Prior art keywords
registers
improvement
selection
memory
data processing
Prior art date
Application number
IT5311374A
Other languages
Italian (it)
Inventor
E M Ney
M E Ompson
D P Andstaetter
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US05/408,150 external-priority patent/US3944985A/en
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Application granted granted Critical
Publication of IT1029586B publication Critical patent/IT1029586B/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/461—Saving or restoring of program or task context
    • G06F9/463—Program control block organisation

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Digital Computer Display Output (AREA)
IT5311374A 1973-10-19 1974-09-19 IMPROVEMENT IN THE SELECTION AND ADDRESSING SYSTEMS OF MEMORY AND D REGISTERS FOR DATA PROCESSING IT1029586B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US40814973A 1973-10-19 1973-10-19
US05/408,150 US3944985A (en) 1973-10-19 1973-10-19 Workspace addressing system

Publications (1)

Publication Number Publication Date
IT1029586B true IT1029586B (en) 1979-03-20

Family

ID=27020169

Family Applications (1)

Application Number Title Priority Date Filing Date
IT5311374A IT1029586B (en) 1973-10-19 1974-09-19 IMPROVEMENT IN THE SELECTION AND ADDRESSING SYSTEMS OF MEMORY AND D REGISTERS FOR DATA PROCESSING

Country Status (6)

Country Link
JP (1) JPS592938B2 (en)
DE (1) DE2449644C2 (en)
FR (1) FR2248555B1 (en)
GB (1) GB1489930A (en)
IT (1) IT1029586B (en)
NL (1) NL7409218A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61200414U (en) * 1985-06-04 1986-12-15
FR3075431B1 (en) * 2017-12-14 2020-01-10 Bull Sas DEVICE, DATA PROCESSING CHAIN AND CONTEXT SWITCHING METHOD

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL280931A (en) * 1961-07-14
GB1153420A (en) * 1968-05-10 1969-05-29 Ibm Improvements in Data Processing Systems
US3740722A (en) * 1970-07-02 1973-06-19 Modicon Corp Digital computer

Also Published As

Publication number Publication date
JPS5068746A (en) 1975-06-09
GB1489930A (en) 1977-10-26
FR2248555A1 (en) 1975-05-16
FR2248555B1 (en) 1979-10-12
JPS592938B2 (en) 1984-01-21
DE2449644C2 (en) 1986-04-30
NL7409218A (en) 1975-04-22
DE2449644A1 (en) 1975-04-30

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Legal Events

Date Code Title Description
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19930707