IT1028309B - INTEGRATED CIRCUIT SIPOSITIVE STRUCTURE ISOLATED WITH OXIDE AND PROCEDURE FOR ITS MANUFACTURING - Google Patents
INTEGRATED CIRCUIT SIPOSITIVE STRUCTURE ISOLATED WITH OXIDE AND PROCEDURE FOR ITS MANUFACTURINGInfo
- Publication number
- IT1028309B IT1028309B IT1919175A IT1919175A IT1028309B IT 1028309 B IT1028309 B IT 1028309B IT 1919175 A IT1919175 A IT 1919175A IT 1919175 A IT1919175 A IT 1919175A IT 1028309 B IT1028309 B IT 1028309B
- Authority
- IT
- Italy
- Prior art keywords
- sipositive
- procedure
- oxide
- manufacturing
- integrated circuit
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Element Separation (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Bipolar Transistors (AREA)
- Bipolar Integrated Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US43289674A | 1974-01-14 | 1974-01-14 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| IT1028309B true IT1028309B (en) | 1979-01-30 |
Family
ID=23718017
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| IT1919175A IT1028309B (en) | 1974-01-14 | 1975-01-10 | INTEGRATED CIRCUIT SIPOSITIVE STRUCTURE ISOLATED WITH OXIDE AND PROCEDURE FOR ITS MANUFACTURING |
Country Status (7)
| Country | Link |
|---|---|
| JP (1) | JPS50104579A (en) |
| CA (1) | CA1010157A (en) |
| DE (1) | DE2500867A1 (en) |
| FR (1) | FR2258001B1 (en) |
| GB (1) | GB1485183A (en) |
| IT (1) | IT1028309B (en) |
| NL (1) | NL7500360A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2605641C3 (en) * | 1976-02-12 | 1979-12-20 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | High frequency transistor and process for its manufacture |
| FR2470444A1 (en) * | 1979-11-21 | 1981-05-29 | Radiotechnique Compelec | Electrical connection network on semiconductor base mfg. method - using floating conductors isolated from base and formed by localised anodic oxidation of metallic coating |
-
1974
- 1974-09-19 CA CA209,524A patent/CA1010157A/en not_active Expired
-
1975
- 1975-01-10 IT IT1919175A patent/IT1028309B/en active
- 1975-01-10 GB GB103175A patent/GB1485183A/en not_active Expired
- 1975-01-10 DE DE19752500867 patent/DE2500867A1/en not_active Withdrawn
- 1975-01-13 FR FR7500839A patent/FR2258001B1/fr not_active Expired
- 1975-01-13 NL NL7500360A patent/NL7500360A/en not_active Application Discontinuation
- 1975-01-14 JP JP599475A patent/JPS50104579A/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| CA1010157A (en) | 1977-05-10 |
| DE2500867A1 (en) | 1975-07-24 |
| FR2258001B1 (en) | 1978-08-25 |
| NL7500360A (en) | 1975-07-16 |
| FR2258001A1 (en) | 1975-08-08 |
| JPS50104579A (en) | 1975-08-18 |
| GB1485183A (en) | 1977-09-08 |
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