IT1006311B - Struttura a barriera di schottky con isolamento dielettrico e metodo per la sua fabbricazione - Google Patents

Struttura a barriera di schottky con isolamento dielettrico e metodo per la sua fabbricazione

Info

Publication number
IT1006311B
IT1006311B IT20308/74A IT2030874A IT1006311B IT 1006311 B IT1006311 B IT 1006311B IT 20308/74 A IT20308/74 A IT 20308/74A IT 2030874 A IT2030874 A IT 2030874A IT 1006311 B IT1006311 B IT 1006311B
Authority
IT
Italy
Prior art keywords
manufacturing
schottky barrier
barrier structure
dielectric insulation
dielectric
Prior art date
Application number
IT20308/74A
Other languages
English (en)
Italian (it)
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Application granted granted Critical
Publication of IT1006311B publication Critical patent/IT1006311B/it

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28537—Deposition of Schottky electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/201—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits
    • H10D84/204—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors
    • H10D84/221—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors of only diodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/037—Diffusion-deposition
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/085—Isolated-integrated
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/117—Oxidation, selective
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/139—Schottky barrier

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
IT20308/74A 1973-04-16 1974-02-08 Struttura a barriera di schottky con isolamento dielettrico e metodo per la sua fabbricazione IT1006311B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US00351399A US3858231A (en) 1973-04-16 1973-04-16 Dielectrically isolated schottky barrier structure and method of forming the same

Publications (1)

Publication Number Publication Date
IT1006311B true IT1006311B (it) 1976-09-30

Family

ID=23380757

Family Applications (1)

Application Number Title Priority Date Filing Date
IT20308/74A IT1006311B (it) 1973-04-16 1974-02-08 Struttura a barriera di schottky con isolamento dielettrico e metodo per la sua fabbricazione

Country Status (6)

Country Link
US (1) US3858231A (enExample)
JP (1) JPS5644569B2 (enExample)
DE (1) DE2407189A1 (enExample)
FR (1) FR2225843B1 (enExample)
GB (1) GB1420286A (enExample)
IT (1) IT1006311B (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3648125A (en) * 1971-02-02 1972-03-07 Fairchild Camera Instr Co Method of fabricating integrated circuits with oxidized isolation and the resulting structure
US4016596A (en) * 1975-06-19 1977-04-05 International Business Machines Corporation High performance integrated bipolar and complementary field effect transistors
US3955269A (en) * 1975-06-19 1976-05-11 International Business Machines Corporation Fabricating high performance integrated bipolar and complementary field effect transistors
US3961999A (en) * 1975-06-30 1976-06-08 Ibm Corporation Method for forming recessed dielectric isolation with a minimized "bird's beak" problem
US4066984A (en) * 1976-08-11 1978-01-03 Ernest Stern Surface acoustic wave devices for processing and storing signals
TW343377B (en) * 1997-12-03 1998-10-21 United Microelectronics Corp Via structure and production process thereof
US6995446B2 (en) * 2002-12-13 2006-02-07 Ovonyx, Inc. Isolating phase change memories with schottky diodes and guard rings

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3322581A (en) * 1965-10-24 1967-05-30 Texas Instruments Inc Fabrication of a metal base transistor
DE1614829C3 (de) * 1967-06-22 1974-04-04 Telefunken Patentverwertungs Gmbh, 7900 Ulm Verfahren zum Herstellen eines Halbleiterbauelementes
US3621344A (en) * 1967-11-30 1971-11-16 William M Portnoy Titanium-silicon rectifying junction
US3649386A (en) * 1968-04-23 1972-03-14 Bell Telephone Labor Inc Method of fabricating semiconductor devices
US3581151A (en) * 1968-09-16 1971-05-25 Bell Telephone Labor Inc Cold cathode structure comprising semiconductor whisker elements
US3558366A (en) * 1968-09-17 1971-01-26 Bell Telephone Labor Inc Metal shielding for ion implanted semiconductor device
NL6816451A (enExample) * 1968-11-19 1970-05-21
US3622842A (en) * 1969-12-29 1971-11-23 Ibm Semiconductor device having high-switching speed and method of making
US3742315A (en) * 1971-10-18 1973-06-26 Matsushita Electronics Corp Schottky barrier type semiconductor device with improved backward breakdown voltage characteristic

Also Published As

Publication number Publication date
US3858231A (en) 1974-12-31
GB1420286A (en) 1976-01-07
FR2225843B1 (enExample) 1976-12-03
DE2407189A1 (de) 1974-10-24
FR2225843A1 (enExample) 1974-11-08
JPS49131686A (enExample) 1974-12-17
JPS5644569B2 (enExample) 1981-10-20

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