IT1001100B - Circuito di verifica e di genera zione di residui modulo 9 partico larmente per sistemi elaboratori di dati - Google Patents

Circuito di verifica e di genera zione di residui modulo 9 partico larmente per sistemi elaboratori di dati

Info

Publication number
IT1001100B
IT1001100B IT41019/73A IT4101973A IT1001100B IT 1001100 B IT1001100 B IT 1001100B IT 41019/73 A IT41019/73 A IT 41019/73A IT 4101973 A IT4101973 A IT 4101973A IT 1001100 B IT1001100 B IT 1001100B
Authority
IT
Italy
Prior art keywords
verification
residues
module
generation
circuit
Prior art date
Application number
IT41019/73A
Other languages
English (en)
Italian (it)
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Application granted granted Critical
Publication of IT1001100B publication Critical patent/IT1001100B/it

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
    • G06F11/104—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error using arithmetic codes, i.e. codes which are preserved during operation, e.g. modulo 9 or 11 check

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Detection And Correction Of Errors (AREA)
  • Error Detection And Correction (AREA)
  • Complex Calculations (AREA)
IT41019/73A 1972-12-14 1973-11-28 Circuito di verifica e di genera zione di residui modulo 9 partico larmente per sistemi elaboratori di dati IT1001100B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US00315268A US3816728A (en) 1972-12-14 1972-12-14 Modulo 9 residue generating and checking circuit

Publications (1)

Publication Number Publication Date
IT1001100B true IT1001100B (it) 1976-04-20

Family

ID=23223633

Family Applications (1)

Application Number Title Priority Date Filing Date
IT41019/73A IT1001100B (it) 1972-12-14 1973-11-28 Circuito di verifica e di genera zione di residui modulo 9 partico larmente per sistemi elaboratori di dati

Country Status (7)

Country Link
US (1) US3816728A (https=)
JP (1) JPS5241134B2 (https=)
CA (1) CA1010572A (https=)
DE (1) DE2361512C2 (https=)
FR (1) FR2211140A5 (https=)
GB (1) GB1430814A (https=)
IT (1) IT1001100B (https=)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4181969A (en) * 1978-01-18 1980-01-01 Westinghouse Electric Corp. System for detecting and isolating static bit faults in a network of arithmetic units
JPS60108675U (ja) * 1983-12-28 1985-07-24 ワイケイケイ株式会社 欄間を有するドアユニツトの竪枠
US4870607A (en) * 1986-07-03 1989-09-26 Nec Corporation Error detection carried out by the use of unused modulo-m code
JPS63240625A (ja) * 1987-03-27 1988-10-06 Nec Corp 障害検出方式
US4994993A (en) * 1988-10-26 1991-02-19 Advanced Micro Devices, Inc. System for detecting and correcting errors generated by arithmetic logic units
US4926374A (en) * 1988-11-23 1990-05-15 International Business Machines Corporation Residue checking apparatus for detecting errors in add, subtract, multiply, divide and square root operations
US5253349A (en) * 1991-01-30 1993-10-12 International Business Machines Corporation Decreasing processing time for type 1 dyadic instructions
DE19851690A1 (de) * 1998-11-10 2000-05-11 Ibm Residuum-Prüfung von Datenumwandlungen
WO2005124578A2 (en) * 2004-06-16 2005-12-29 Discretix Technologies Ltd System, method and apparatus of error detection during a modular operation
US7769795B1 (en) * 2005-06-03 2010-08-03 Oracle America, Inc. End-to-end residue-based protection of an execution pipeline that supports floating point operations
US7739323B2 (en) * 2006-06-20 2010-06-15 International Business Machines Corporation Systems, methods and computer program products for providing a combined moduli-9 and 3 residue generator
US8566383B2 (en) * 2008-10-17 2013-10-22 International Business Machines Corporation Distributed residue-checking of a floating point unit
US9110768B2 (en) * 2012-12-28 2015-08-18 Intel Corporation Residue based error detection for integer and floating point execution units
US9513870B2 (en) 2014-04-22 2016-12-06 Dialog Semiconductor (Uk) Limited Modulo9 and modulo7 operation on unsigned binary numbers
JP6049920B1 (ja) * 2016-01-15 2016-12-21 株式会社 ディー・エヌ・エー 情報処理装置及び情報処理プログラム
DE102018213512A1 (de) * 2018-08-10 2020-02-13 Denso Corporation Fehlererfassungs-arithmetik-logik-einheit-system

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3636334A (en) * 1969-01-02 1972-01-18 Univ California Parallel adder with distributed control to add a plurality of binary numbers
US3603776A (en) * 1969-01-15 1971-09-07 Ibm Binary batch adder utilizing threshold counters
US3659089A (en) * 1970-12-23 1972-04-25 Ibm Error detecting and correcting system and method
US3723715A (en) * 1971-08-25 1973-03-27 Ibm Fast modulo threshold operator binary adder for multi-number additions

Also Published As

Publication number Publication date
JPS5241134B2 (https=) 1977-10-17
US3816728A (en) 1974-06-11
JPS4990847A (https=) 1974-08-30
DE2361512C2 (de) 1981-09-17
DE2361512A1 (de) 1974-06-20
CA1010572A (en) 1977-05-17
GB1430814A (en) 1976-04-07
FR2211140A5 (https=) 1974-07-12

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