IN2015DN02499A - - Google Patents

Info

Publication number
IN2015DN02499A
IN2015DN02499A IN2499DEN2015A IN2015DN02499A IN 2015DN02499 A IN2015DN02499 A IN 2015DN02499A IN 2499DEN2015 A IN2499DEN2015 A IN 2499DEN2015A IN 2015DN02499 A IN2015DN02499 A IN 2015DN02499A
Authority
IN
India
Prior art keywords
portions
frames
frame
outputting
changed relative
Prior art date
Application number
Other languages
English (en)
Inventor
Gabriel Abarca
David I J Glen
Original Assignee
Ati Technologies Ulc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ati Technologies Ulc filed Critical Ati Technologies Ulc
Publication of IN2015DN02499A publication Critical patent/IN2015DN02499A/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/60—Memory management
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • G06F3/1415—Digital output to display device ; Cooperation and interconnection of the display device with other functional units with means for detecting differences between the image stored in the host and the images displayed on the displays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/399—Control of the bit-mapped memory using two or more bit-mapped memories, the operations of which are switched in time, e.g. ping-pong buffers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/04—Partial updating of the display screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/10—Special adaptations of display systems for operation with variable images
    • G09G2320/103—Detection of image changes, e.g. determination of an index representative of the image change
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2350/00—Solving problems of bandwidth in display systems
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/18—Use of a frame buffer in a display terminal, inclusive of the display panel
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/395—Arrangements specially adapted for transferring the contents of the bit-mapped memory to the screen

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Human Computer Interaction (AREA)
  • General Engineering & Computer Science (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Image Generation (AREA)
  • Television Systems (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Digital Computer Display Output (AREA)
IN2499DEN2015 2012-09-05 2013-09-05 IN2015DN02499A (es)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201261697261P 2012-09-05 2012-09-05
PCT/CA2013/050682 WO2014036652A1 (en) 2012-09-05 2013-09-05 Method and device for selective display refresh
US14/018,869 US10134106B2 (en) 2012-09-05 2013-09-05 Method and device for selective display refresh

Publications (1)

Publication Number Publication Date
IN2015DN02499A true IN2015DN02499A (es) 2015-09-11

Family

ID=50186917

Family Applications (1)

Application Number Title Priority Date Filing Date
IN2499DEN2015 IN2015DN02499A (es) 2012-09-05 2013-09-05

Country Status (7)

Country Link
US (1) US10134106B2 (es)
EP (1) EP2893529B1 (es)
JP (1) JP6275146B2 (es)
KR (1) KR102065564B1 (es)
CN (1) CN104641412B (es)
IN (1) IN2015DN02499A (es)
WO (1) WO2014036652A1 (es)

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US10282887B2 (en) * 2014-12-12 2019-05-07 Mitsubishi Electric Corporation Information processing apparatus, moving image reproduction method, and computer readable medium for generating display object information using difference information between image frames
US10446118B2 (en) * 2015-06-02 2019-10-15 Intel Corporation Apparatus and method using subdivided swapchains for improved virtual reality implementations
US10078883B2 (en) * 2015-12-03 2018-09-18 Qualcomm Incorporated Writing graphics data from local memory to system memory
US10283078B2 (en) * 2016-01-20 2019-05-07 Mediatek Inc. Adaptive display partial update methods and apparatus thereof for power saving in pixel processing
CN107316270A (zh) * 2016-04-25 2017-11-03 联发科技股份有限公司 为由多个帧组成的图像数据生成脏信息的方法及图形系统
US9997141B2 (en) * 2016-09-13 2018-06-12 Omnivision Technologies, Inc. Display system and method supporting variable input rate and resolution
US10545242B2 (en) 2016-09-14 2020-01-28 Apple Inc. Systems and methods for in-frame sensing and adaptive sensing control
CN106997561A (zh) * 2017-04-18 2017-08-01 湖南福米信息科技有限责任公司 股票行情数据的显示方法、系统及终端设备
US10672367B2 (en) * 2017-07-03 2020-06-02 Arm Limited Providing data to a display in data processing systems
US10504452B2 (en) 2018-03-12 2019-12-10 Apple Inc. Pixel contrast control systems and methods
US10516812B2 (en) 2018-04-02 2019-12-24 Intel Corporation Devices and methods for selective display frame fetch
CN111611031A (zh) * 2019-02-26 2020-09-01 华为技术有限公司 一种图形绘制方法和电子设备
US11295660B2 (en) 2019-06-10 2022-04-05 Ati Technologies Ulc Frame replay for variable rate refresh display
US11605366B2 (en) * 2020-09-10 2023-03-14 Microchip Technology Incorporated LCC (low cost controllerless) graphics processing
TWI772933B (zh) * 2020-10-23 2022-08-01 宏正自動科技股份有限公司 影像處理裝置及多畫面顯示的影像處理方法
US11935149B2 (en) * 2020-11-13 2024-03-19 Samsung Electronics Co., Ltd Electronic device and image rendering method thereof for adjusting frame rate

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US5801717A (en) * 1996-04-25 1998-09-01 Microsoft Corporation Method and system in display device interface for managing surface memory
US6128026A (en) * 1998-05-04 2000-10-03 S3 Incorporated Double buffered graphics and video accelerator having a write blocking memory interface and method of doing the same
US6847358B1 (en) * 1999-08-06 2005-01-25 Microsoft Corporation Workstation for processing and producing a video signal
US6943801B2 (en) * 2000-03-31 2005-09-13 Scott A. Rosenberg System and method for refreshing imaging devices or displays on a page-level basis
US6888551B2 (en) * 2001-12-07 2005-05-03 Intel Corporation Sparse refresh of display
US7038689B2 (en) * 2002-02-19 2006-05-02 Intel Corporation Sparse refresh double-buffering
US6911983B2 (en) * 2003-03-12 2005-06-28 Nvidia Corporation Double-buffering of pixel data using copy-on-write semantics
US7394465B2 (en) * 2005-04-20 2008-07-01 Nokia Corporation Displaying an image using memory control unit
US20070139445A1 (en) * 2005-12-16 2007-06-21 Intel Corporation Method and apparatus for displaying rotated images
JP4622865B2 (ja) * 2006-01-13 2011-02-02 ヤマハ株式会社 画像処理装置
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US8803898B2 (en) * 2009-12-17 2014-08-12 Arm Limited Forming a windowing display in a frame buffer
EP2559241A1 (de) 2010-04-14 2013-02-20 Siemens Enterprise Communications GmbH & Co. KG Verfahren zum deblocking-filtern
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WO2012035632A1 (ja) * 2010-09-16 2012-03-22 株式会社 東芝 画像生成装置
US20120218277A1 (en) 2011-02-25 2012-08-30 ST-Ericcson SA Display list mechanism and scalable display engine structures
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US9472018B2 (en) * 2011-05-19 2016-10-18 Arm Limited Graphics processing systems

Also Published As

Publication number Publication date
CN104641412A (zh) 2015-05-20
WO2014036652A1 (en) 2014-03-13
KR20150047612A (ko) 2015-05-04
EP2893529A1 (en) 2015-07-15
JP2016500163A (ja) 2016-01-07
US10134106B2 (en) 2018-11-20
JP6275146B2 (ja) 2018-02-07
EP2893529A4 (en) 2016-05-04
US20140063034A1 (en) 2014-03-06
EP2893529B1 (en) 2020-01-15
CN104641412B (zh) 2018-05-25
KR102065564B1 (ko) 2020-03-02

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