IN2014CH01654A - - Google Patents
Download PDFInfo
- Publication number
- IN2014CH01654A IN2014CH01654A IN1654CH2014A IN2014CH01654A IN 2014CH01654 A IN2014CH01654 A IN 2014CH01654A IN 1654CH2014 A IN1654CH2014 A IN 1654CH2014A IN 2014CH01654 A IN2014CH01654 A IN 2014CH01654A
- Authority
- IN
- India
- Prior art keywords
- several
- data process
- processing
- data
- egress
- Prior art date
Links
- 238000000034 method Methods 0.000 abstract 7
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L45/00—Routing or path finding of packets in data switching networks
- H04L45/50—Routing or path finding of packets in data switching networks using label swapping, e.g. multi-protocol label switch [MPLS]
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L45/00—Routing or path finding of packets in data switching networks
- H04L45/74—Address processing for routing
- H04L45/745—Address table lookup; Address filtering
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L45/00—Routing or path finding of packets in data switching networks
- H04L45/74—Address processing for routing
- H04L45/745—Address table lookup; Address filtering
- H04L45/7452—Multiple parallel or consecutive lookup operations
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| IN1654CH2014 IN2014CH01654A (enExample) | 2014-03-28 | 2014-03-28 | |
| US14/670,384 US10044614B2 (en) | 2014-03-28 | 2015-03-26 | System and method for dynamic and configurable L2/L3 data—plane in FPGA |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| IN1654CH2014 IN2014CH01654A (enExample) | 2014-03-28 | 2014-03-28 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| IN2014CH01654A true IN2014CH01654A (enExample) | 2015-10-09 |
Family
ID=54191972
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| IN1654CH2014 IN2014CH01654A (enExample) | 2014-03-28 | 2014-03-28 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US10044614B2 (enExample) |
| IN (1) | IN2014CH01654A (enExample) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10230810B1 (en) | 2016-03-18 | 2019-03-12 | Barefoot Networks, Inc. | Storing packet data in mirror buffer |
| US10949199B1 (en) | 2017-09-14 | 2021-03-16 | Barefoot Networks, Inc. | Copying packet data to mirror buffer |
| US10608939B1 (en) | 2018-02-13 | 2020-03-31 | Barefoot Networks, Inc. | Identifying congestion in a network |
| CN108920097B (zh) * | 2018-06-11 | 2021-04-13 | 北京理工雷科雷达技术研究院有限公司 | 一种基于交织存储的三维数据处理方法 |
| US12348494B2 (en) * | 2019-09-24 | 2025-07-01 | Pribit Technology, Inc. | Network access control system and method therefor |
| JP7395211B2 (ja) | 2019-09-24 | 2023-12-11 | プライビット テクノロジー インク | 端末のネットワーク接続を認証及び制御するためのシステム及びそれに関する方法 |
| US12381890B2 (en) | 2019-09-24 | 2025-08-05 | Pribit Technology, Inc. | System and method for secure network access of terminal |
| US12166759B2 (en) | 2019-09-24 | 2024-12-10 | Pribit Technology, Inc. | System for remote execution code-based node control flow management, and method therefor |
| JP2022187578A (ja) | 2021-06-08 | 2022-12-20 | 富士通株式会社 | 通信制御装置,通信制御システムおよび通信制御方法 |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7782853B2 (en) * | 2002-12-06 | 2010-08-24 | Stmicroelectronics, Inc. | Apparatus and method of using fully configurable memory, multi-stage pipeline logic and an embedded processor to implement multi-bit trie algorithmic network search engine |
| US7539199B2 (en) * | 2003-02-21 | 2009-05-26 | Gireesh Shrimali | Switch fabric scheduling with fairness and priority consideration |
| US7583588B2 (en) * | 2004-11-30 | 2009-09-01 | Broadcom Corporation | System and method for maintaining a layer 2 modification buffer |
| US7809009B2 (en) * | 2006-02-21 | 2010-10-05 | Cisco Technology, Inc. | Pipelined packet switching and queuing architecture |
| US8724624B2 (en) * | 2009-12-22 | 2014-05-13 | Cuneyt Bazlamacci | Systolic array architecture for fast IP lookup |
| WO2012024699A1 (en) * | 2010-08-20 | 2012-02-23 | Mosys, Inc. | Data synchronization for circuit resources without using a resource buffer |
| US9086878B2 (en) * | 2012-06-29 | 2015-07-21 | Broadcom Corporation | Oversubscribing to a packet processing device to adjust power consumption |
| US20140156941A1 (en) * | 2012-11-30 | 2014-06-05 | Advanced Micro Devices, Inc. | Tracking Non-Native Content in Caches |
-
2014
- 2014-03-28 IN IN1654CH2014 patent/IN2014CH01654A/en unknown
-
2015
- 2015-03-26 US US14/670,384 patent/US10044614B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| US10044614B2 (en) | 2018-08-07 |
| US20150281131A1 (en) | 2015-10-01 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| IN2014CH01654A (enExample) | ||
| SG11201907942QA (en) | Blockchain cluster processing system and method, computer device and storage medium | |
| EP3855324A4 (en) | ASSOCIATIVE RECOMMENDATION PROCESS AND APPARATUS, ASSOCIATED COMPUTER DEVICE AND STORAGE MEDIA | |
| MY170382A (en) | Mac address hardware learning method and system based on hash table and tcam table | |
| PH12019501132A1 (en) | Method and device for processing service request | |
| GB2533505A (en) | Data processing systems | |
| PH12018550192A1 (en) | Relational rendering of holographic objects | |
| TW201614501A (en) | Systems and methods for segmenting data structures in a memory system | |
| EP3750068A4 (en) | DIRECT REMOTE MEMORY ACCESS IN MULTI-LEVEL MEMORY SYSTEMS | |
| MX349042B (es) | Sistema y metodo para motores de consulta de base de datos distribuidos. | |
| SG10201903332RA (en) | Memory Management Supporting Huge Pages | |
| WO2014146012A3 (en) | Data bus inversion including data signals grouped into 10 bits | |
| WO2016018472A3 (en) | Content-based association of device to user | |
| SG11201809697YA (en) | Topic alarm method, device, computer apparatus, and storage medium | |
| EP4564160A3 (en) | Hardware apparatuses and methods for memory corruption detection | |
| GB2550800A (en) | Managing data in storage according to a log structure | |
| GB2525551A (en) | Boosting remote direct memory access performance using cryptographic hash based approach | |
| IN2013CH05115A (enExample) | ||
| HK1223710A1 (zh) | 视觉语义复合网络以及用於形成该网络的方法 | |
| MX383436B (es) | Expansión y contracción de dirección en un sistema de computadora de subprocesamiento múltiple. | |
| AU2014410705A1 (en) | Data processing method and apparatus | |
| WO2018213073A3 (en) | TRANSFER OF BANK BANK DATA | |
| EP3968725A4 (en) | DATA TRANSMISSION METHOD, ACCESS CATEGORY CREATION METHOD, APPARATUS AND INFORMATION MEDIA | |
| WO2016174521A8 (en) | Multiple read and write port memory | |
| GB2571686A (en) | System and method for analyzing and associating elements of a computer system by shared characteristics |