IN2013MU01870A - - Google Patents

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Publication number
IN2013MU01870A
IN2013MU01870A IN1870MU2013A IN2013MU01870A IN 2013MU01870 A IN2013MU01870 A IN 2013MU01870A IN 1870MU2013 A IN1870MU2013 A IN 1870MU2013A IN 2013MU01870 A IN2013MU01870 A IN 2013MU01870A
Authority
IN
India
Prior art keywords
input data
processing
control signals
signals
data
Prior art date
Application number
Inventor
Krishnaraj Varma
Tony Huang
Sri Bhat
Original Assignee
Hughes Network Systems Llc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hughes Network Systems Llc filed Critical Hughes Network Systems Llc
Publication of IN2013MU01870A publication Critical patent/IN2013MU01870A/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/0014—Carrier regulation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2647—Arrangements specific to the receiver only
    • H04L27/2655—Synchronisation arrangements
    • H04L27/2656—Frame synchronisation, e.g. packet synchronisation, time division duplex [TDD] switching point detection or subframe synchronisation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2647—Arrangements specific to the receiver only
    • H04L27/2655—Synchronisation arrangements
    • H04L27/2657—Carrier synchronisation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2647—Arrangements specific to the receiver only
    • H04L27/2655—Synchronisation arrangements
    • H04L27/2689—Link with other circuits, i.e. special connections between synchronisation arrangements and other circuits for achieving synchronisation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L2025/03433—Arrangements for removing intersymbol interference characterised by equaliser structure
    • H04L2025/03439—Fixed structures
    • H04L2025/03445—Time domain
    • H04L2025/03471—Tapped delay lines
    • H04L2025/03477—Tapped delay lines not time-recursive
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L2025/03592—Adaptation methods
    • H04L2025/03598—Algorithms
    • H04L2025/03611—Iterative algorithms
    • H04L2025/03636—Algorithms using least mean square [LMS]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/0014—Carrier regulation
    • H04L2027/0024—Carrier regulation at the receiver end
    • H04L2027/0026—Correction of carrier offset
    • H04L2027/0038—Correction of carrier offset using an equaliser
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L25/03012—Arrangements for removing intersymbol interference operating in the time domain
    • H04L25/03019—Arrangements for removing intersymbol interference operating in the time domain adaptive, i.e. capable of adjustment during data reception
    • H04L25/03038—Arrangements for removing intersymbol interference operating in the time domain adaptive, i.e. capable of adjustment during data reception with a non-recursive structure

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Radio Relay Systems (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Abstract

A method and apparatus for processing input data signals transmitted in a continuous mode,or in a burst mode, of signal transmission, such as in asatellite or a computer network communications system. A receiver receives input data signals anda buffer stores the received input data. Processing circuitry generates frame timing synchronization control signals for writing the frames of the input data for storage, generates timing error control signals corresponding to a processing delay for the input data, forsynchronizing reading out the stored data from the buffer based on a timing difference between the timing error control signals and the frame timing synchronization control signals to adjust for an arbitrary delay in processing the input data.The processing circuitrycan include a tap gradient update circuit for generating a tap gradient corresponding tothe read out data, based on equalizer error signals generated by the processing circuitry.
IN1870MU2013 2012-05-29 2013-05-27 IN2013MU01870A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US13/482,686 US8929501B2 (en) 2012-05-29 2012-05-29 Method and apparatus for synchronization of data and error samples in a communications system

Publications (1)

Publication Number Publication Date
IN2013MU01870A true IN2013MU01870A (en) 2015-06-26

Family

ID=48576217

Family Applications (1)

Application Number Title Priority Date Filing Date
IN1870MU2013 IN2013MU01870A (en) 2012-05-29 2013-05-27

Country Status (4)

Country Link
US (1) US8929501B2 (en)
EP (1) EP2670100B1 (en)
BR (1) BR102013013386B1 (en)
IN (1) IN2013MU01870A (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9874858B2 (en) * 2014-03-18 2018-01-23 The United States Of America As Represented By The Secretary Of The Navy Automation control system and a method in an automation control system
KR102234792B1 (en) * 2014-09-03 2021-04-01 삼성전자주식회사 Digital television and control method thereof
US10972878B2 (en) * 2015-10-13 2021-04-06 Samsung Electronics Co., Ltd. Method and apparatus for providing unicast based multimedia service
US9641803B1 (en) * 2016-10-13 2017-05-02 Cisco Technology, Inc. Multiplexing FEC protection of multiple streams with different delay requirements
IL255600B (en) * 2017-11-12 2019-01-31 Satixfy Israel Ltd System and method for regenerative satellite communications
US11979131B2 (en) * 2021-05-19 2024-05-07 Hughes Network Systems, LLC. High-rate decimation filter with low hardware complexity

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4811360A (en) * 1988-01-14 1989-03-07 General Datacomm, Inc. Apparatus and method for adaptively optimizing equalization delay of data communication equipment
US6307868B1 (en) * 1995-08-25 2001-10-23 Terayon Communication Systems, Inc. Apparatus and method for SCDMA digital data transmission using orthogonal codes and a head end modem with no tracking loops
KR100314353B1 (en) * 1998-04-28 2001-12-28 전주범 Ofdm receiver system
US20020131528A1 (en) 2001-01-10 2002-09-19 Hughes Electronics System and method of parallel partitioning a satellite communications modem
US6985523B2 (en) 2001-01-10 2006-01-10 Hughes Electronics Corp. Method and system for adaptive equalization for receivers in a wide-band satellite communications system
US6904273B2 (en) 2001-01-10 2005-06-07 Hughes Electronics Corporation Method and system for automatic gain control in a satellite communications system
US7580482B2 (en) * 2003-02-19 2009-08-25 Endres Thomas J Joint, adaptive control of equalization, synchronization, and gain in a digital communications receiver
US7382826B2 (en) * 2004-01-27 2008-06-03 Zenith Electronics Llc Method and apparatus for the control of a decision feedback equalizer
US7571338B2 (en) * 2004-05-24 2009-08-04 Telefonaktiebolaget Lm Ericsson (Publ) Determining a time difference between first and second clock domains
US7196644B1 (en) * 2004-07-01 2007-03-27 Seagate Technology Llc Decoupling of analog input and digital output
US8559573B2 (en) * 2005-12-27 2013-10-15 Agere Systems Llc Communications circuit and method with re-positionable sampling span
US8290092B2 (en) * 2009-05-20 2012-10-16 Himax Media Solutions, Inc. Digital demodulating apparatus for timing error detection
JP5564853B2 (en) * 2009-08-14 2014-08-06 ソニー株式会社 Receiving apparatus and method, program, and receiving system
KR20110119119A (en) * 2010-04-26 2011-11-02 삼성전자주식회사 Diversity receiver for processing vsb signal

Also Published As

Publication number Publication date
EP2670100B1 (en) 2017-09-27
US8929501B2 (en) 2015-01-06
EP2670100A3 (en) 2015-01-21
BR102013013386A2 (en) 2015-07-07
US20130322511A1 (en) 2013-12-05
BR102013013386B1 (en) 2022-06-28
EP2670100A2 (en) 2013-12-04
BR102013013386A8 (en) 2021-04-06

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