IN2013CH04627A - - Google Patents

Info

Publication number
IN2013CH04627A
IN2013CH04627A IN4627CH2013A IN2013CH04627A IN 2013CH04627 A IN2013CH04627 A IN 2013CH04627A IN 4627CH2013 A IN4627CH2013 A IN 4627CH2013A IN 2013CH04627 A IN2013CH04627 A IN 2013CH04627A
Authority
IN
India
Application number
Inventor
Saif Kunjatur Sheikh Mohammed
Shanmukheswara Rao Setti
Rachamadugu Vinod
Original Assignee
Lsi Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lsi Corp filed Critical Lsi Corp
Priority to IN4627CH2013 priority Critical patent/IN2013CH04627A/en
Publication of IN2013CH04627A publication Critical patent/IN2013CH04627A/en

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing, power reduction
    • G11C11/417Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing, power reduction for memory cells of the field-effect type
    • G11C11/419Read-write [R-W] circuits
IN4627CH2013 2013-10-14 2013-10-14 IN2013CH04627A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
IN4627CH2013 IN2013CH04627A (en) 2013-10-14 2013-10-14

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
IN4627CH2013 IN2013CH04627A (en) 2013-10-14 2013-10-14
US14/102,649 US20150103604A1 (en) 2013-10-14 2013-12-11 Memory array architectures having memory cells with shared write assist circuitry

Publications (1)

Publication Number Publication Date
IN2013CH04627A true IN2013CH04627A (en) 2015-04-24

Family

ID=52809534

Family Applications (1)

Application Number Title Priority Date Filing Date
IN4627CH2013 IN2013CH04627A (en) 2013-10-14 2013-10-14

Country Status (2)

Country Link
US (1) US20150103604A1 (en)
IN (1) IN2013CH04627A (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10176855B2 (en) * 2013-11-21 2019-01-08 Taiwan Semiconductor Manufacturing Company, Ltd. Three-dimensional (3-D) write assist scheme for memory cells
US9940993B2 (en) * 2016-04-07 2018-04-10 Arm Limited Storage bitcell with isolation
US9837144B1 (en) 2017-01-17 2017-12-05 Qualcomm Incorporated Apparatus and method for controlling boost capacitance for low power memory circuits
US10147483B1 (en) * 2017-09-19 2018-12-04 Qualcomm Incorporated Robust write driver scheme for static random access memory compilers
US10446223B1 (en) 2018-08-29 2019-10-15 Bitfury Group Limited Data storage apparatus, and related systems and methods

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4912016B2 (en) * 2005-05-23 2012-04-04 ルネサスエレクトロニクス株式会社 Semiconductor memory device

Also Published As

Publication number Publication date
US20150103604A1 (en) 2015-04-16

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