IL86328A0 - Asynchronous edge-triggered rs flip-flop circuit - Google Patents

Asynchronous edge-triggered rs flip-flop circuit

Info

Publication number
IL86328A0
IL86328A0 IL86328A IL8632888A IL86328A0 IL 86328 A0 IL86328 A0 IL 86328A0 IL 86328 A IL86328 A IL 86328A IL 8632888 A IL8632888 A IL 8632888A IL 86328 A0 IL86328 A0 IL 86328A0
Authority
IL
Israel
Prior art keywords
flip
triggered
flop circuit
asynchronous edge
asynchronous
Prior art date
Application number
IL86328A
Other languages
English (en)
Original Assignee
Montedison Spa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Montedison Spa filed Critical Montedison Spa
Publication of IL86328A0 publication Critical patent/IL86328A0/xx

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037—Bistable circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Logic Circuits (AREA)
  • Pulse Circuits (AREA)
IL86328A 1987-05-15 1988-05-10 Asynchronous edge-triggered rs flip-flop circuit IL86328A0 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT20536/87A IT1204621B (it) 1987-05-15 1987-05-15 Circuito flip-flop rs asincrono con scatto comandato dalle transizioni applicate agli ingressi

Publications (1)

Publication Number Publication Date
IL86328A0 true IL86328A0 (en) 1988-11-15

Family

ID=11168420

Family Applications (1)

Application Number Title Priority Date Filing Date
IL86328A IL86328A0 (en) 1987-05-15 1988-05-10 Asynchronous edge-triggered rs flip-flop circuit

Country Status (9)

Country Link
US (1) US4894557A (ja)
EP (1) EP0291360A3 (ja)
JP (1) JPS6454809A (ja)
KR (1) KR880014563A (ja)
AU (1) AU598127B2 (ja)
BR (1) BR8802340A (ja)
IL (1) IL86328A0 (ja)
IT (1) IT1204621B (ja)
ZA (1) ZA883368B (ja)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4980577A (en) * 1987-06-18 1990-12-25 Advanced Micro Devices, Inc. Dual triggered edge-sensitive asynchrounous flip-flop
US5124568A (en) * 1991-02-14 1992-06-23 Advanced Micro Devices, Inc. Edge-triggered flip-flop
EP0685938A1 (en) * 1994-05-31 1995-12-06 STMicroelectronics S.r.l. A bistable sequential logic network which is sensible to input signals edges
US6072348A (en) * 1997-07-09 2000-06-06 Xilinx, Inc. Programmable power reduction in a clock-distribution circuit
US6061418A (en) * 1998-06-22 2000-05-09 Xilinx, Inc. Variable clock divider with selectable duty cycle
US6629223B2 (en) * 1998-10-06 2003-09-30 Texas Instruments Incorporated Method and apparatus for accessing a memory core multiple times in a single clock cycle
EP1865601A1 (en) * 2006-06-08 2007-12-12 STMicroelectronics S.r.l. Asynchronous RS flip-flop having a test mode
US7962681B2 (en) * 2008-01-09 2011-06-14 Qualcomm Incorporated System and method of conditional control of latch circuit devices
US9147620B2 (en) * 2012-03-28 2015-09-29 Teradyne, Inc. Edge triggered calibration
WO2018141359A1 (en) 2017-01-31 2018-08-09 Huawei Technologies Co., Ltd. A double data rate time interpolating quantizer with reduced kickback noise
CN114553194A (zh) * 2022-02-28 2022-05-27 电子科技大学 一种基于融合逻辑的具有多层优先级的静态rs触发器

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4607173A (en) * 1984-03-14 1986-08-19 At&T Bell Laboratories Dual-clock edge triggered flip-flop circuits
IT1204915B (it) * 1987-03-11 1989-03-10 Montedison Spa Derivatori per sistemi asincronici

Also Published As

Publication number Publication date
KR880014563A (ko) 1988-12-24
IT8720536A0 (it) 1987-05-15
ZA883368B (en) 1988-11-14
EP0291360A2 (en) 1988-11-17
IT1204621B (it) 1989-03-10
JPS6454809A (en) 1989-03-02
AU1607888A (en) 1988-11-17
BR8802340A (pt) 1988-12-13
AU598127B2 (en) 1990-06-14
EP0291360A3 (en) 1989-08-30
US4894557A (en) 1990-01-16

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