IL81423A - Apparatus and method for providing a settling time cycle for a system bus in a data processing system - Google Patents

Apparatus and method for providing a settling time cycle for a system bus in a data processing system

Info

Publication number
IL81423A
IL81423A IL81423A IL8142387A IL81423A IL 81423 A IL81423 A IL 81423A IL 81423 A IL81423 A IL 81423A IL 8142387 A IL8142387 A IL 8142387A IL 81423 A IL81423 A IL 81423A
Authority
IL
Israel
Prior art keywords
providing
data processing
time cycle
settling time
processing system
Prior art date
Application number
IL81423A
Other languages
English (en)
Other versions
IL81423A0 (en
Original Assignee
Digital Equipment Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Digital Equipment Corp filed Critical Digital Equipment Corp
Publication of IL81423A0 publication Critical patent/IL81423A0/xx
Publication of IL81423A publication Critical patent/IL81423A/xx

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G06F13/4072—Drivers or receivers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
    • G06F13/364—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using independent requests or grants, e.g. using separated request and grant lines

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Bus Control (AREA)
  • Multi Processors (AREA)
  • Small-Scale Networks (AREA)
IL81423A 1986-01-29 1987-01-29 Apparatus and method for providing a settling time cycle for a system bus in a data processing system IL81423A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US82377486A 1986-01-29 1986-01-29

Publications (2)

Publication Number Publication Date
IL81423A0 IL81423A0 (en) 1987-08-31
IL81423A true IL81423A (en) 1991-06-10

Family

ID=25239674

Family Applications (1)

Application Number Title Priority Date Filing Date
IL81423A IL81423A (en) 1986-01-29 1987-01-29 Apparatus and method for providing a settling time cycle for a system bus in a data processing system

Country Status (7)

Country Link
EP (1) EP0290472A1 (ja)
JP (1) JPH01501426A (ja)
AU (1) AU7033687A (ja)
CA (1) CA1278100C (ja)
ES (1) ES2002950A6 (ja)
IL (1) IL81423A (ja)
WO (1) WO1987004827A1 (ja)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2657740A1 (fr) * 1990-01-26 1991-08-02 Sgs Thomson Microelectronics Procede et circuit de commande d'un bus de sortie de circuit integre.
US6188249B1 (en) * 1998-06-30 2001-02-13 Sun Microsystems, Inc. Asymmetric arbiter with fast signal path
US7203779B2 (en) * 2002-01-30 2007-04-10 Stmicroelectronics, Inc. Fast turn-off slow turn-on arbitrator for reducing tri-state driver power dissipation on a shared bus

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4186379A (en) * 1977-04-28 1980-01-29 Hewlett-Packard Company High-speed data transfer apparatus
US4249093A (en) * 1978-09-06 1981-02-03 Lockheed Electronics Co., Inc. Multiple request arbitration circuit

Also Published As

Publication number Publication date
CA1278100C (en) 1990-12-18
AU7033687A (en) 1987-08-25
WO1987004827A1 (en) 1987-08-13
IL81423A0 (en) 1987-08-31
EP0290472A1 (en) 1988-11-17
ES2002950A6 (es) 1988-10-01
JPH01501426A (ja) 1989-05-18

Similar Documents

Publication Publication Date Title
GB2216368B (en) Bus arbitration method and apparatus
EP0149451A3 (en) Apparatus and method for reconfiguring a memory in a data processing system
EP0276428A3 (en) An electronic calendaring method for use in data processing system
EP0276424A3 (en) Electronic calendaring method for use in a data processing system
EP0276429A3 (en) Electronic calendaring method for use in a data processing system
EP0241678A3 (en) Method for self-configuring terminals in a data processing system
EP0127772A3 (en) Method and apparatus for processing messages in a computing system
GB2229298B (en) System and method applicable to vehicles for communicating between data processing stations
EP0115609A3 (en) Addressing method and device for the storage of several data processing units in a bus system
GB2227144B (en) System and method applicable to vehicles for communicating between data processing stations
EP0261335A3 (en) Test method and apparatus for a distributed processing system
GB2237908B (en) Method and apparatus for parallel processing data
IL81424A (en) Apparatus and method for responding to an aborted signal exchange between subsystems in a data processing system
EP0266145A3 (en) Improved algebraic expression manipulation method and implementation for an electronic data processing apparatus
EP0269995A3 (en) Parallel data processing apparatus and method
AR244445A1 (es) Aparato conector de conductores multiples para circuitos de controlador de dispositivo periferico a una linea comun de computadora, utilizado para dicha interconecion.
IL91929A0 (en) Apparatus and method for data acquisition and processing
DE3377821D1 (en) Apparatus and method for buffering data in a data processing system
GB2040521B (en) Method and apparatus for enhancing i/o transfers in a named data processing system
GB2236460B (en) Apparatus and method for transferring data along a serial data bus
IL81423A (en) Apparatus and method for providing a settling time cycle for a system bus in a data processing system
GB2174517B (en) Apparatus and method for utilizing an auxiliary data memory unit in a data processing system having separate program and data memory units
IL93964A0 (en) Method for processing an instruction sequence in computer systems
EP0250876A3 (en) Apparatus and method for page replacement in a data-processing system having a virtual memory
IL81425A0 (en) Apparatus and method for increased system bus utilization in a data processing system

Legal Events

Date Code Title Description
RH Patent void