IL45708A

IL45708A - Optical printer character generator

Info

Publication number: IL45708A
Application number: IL45708A
Authority: IL
Original assignee: Ibm
Priority date: 1973-10-23
Filing date: 1974-09-23
Publication date: 1976-07-30
Also published as: SE393699B; NL7413314A; GB1436517A; CH587524A5; IT1020328B; CA1056442A; IL45708A0; FR2248544A1; FR2248544B1; JPS5647590B2; JPS5074942A; BE819837A; SE7413311L

Claims

1. V. Apparatus for prog essively generating an image 2. of a page bearing rows of symbols on an image receiving 3 . mem er by traversing binary image el ement generat ing means 4 relative to said image receiving member to generate 5 col umnar ■ segments of said page image, said apparatus · 6 including means producing a train of clocking pulses that 7 is indicative of the relative position of said binary image 8 element generating means in its traversal of a columnar 9 segment, cycle control means responsive to said clocking 10 pulses for defining successive operating cycles, and mean? 11. controlling said binary image element generating means 12 during said operating cycles, wherein the improvement 13 com pr i ses: . - 1 a page memory capable of storing a plurality 15 of symbol identifying codes at storage addresses each of 16 which, is individually associatable with a respective ordered 17 position, of a symbol to be generated, in a respective one of 18 said rows , 19 ' ■· . ■ ' . first page memory address control means for 20 identifying successive ones of said rows during successive 21 ones of said operating cycles, 22 second page memory address . control means 23 controlled by the identification of a row by said first page 24 memory address control means for specifying in conjunction 25 therewith an address in said page memory associated with a 26 discrete order position of a symbol . to be generated within 27 the row dentified, said second page memory address control 28 means comprising register means having a plurality of stages 29 for storing respective ones of a plurality of sequentially 30 retrievable data words, each of said stages being individually 31. sue i a ted with a respective one of said rows, 32 each of said data words identifying at least the order 33 position of a symbol to be generated in said respective one 34 row, 35 a font memory capable of storing a plurality 36 of data bits organized into discrete groups each of which ■37 defines a contrast control pattern which when displayed in 38 synchronism with a correlated raster generates the configura- 39 tion.of a symbol, each of said groups being further organized 40 i nto a pi ural i ty of discrete bit series each of which defines 41 a contrast control sub-pattern for which when displayed in 42 synchronism with the traversal of said binary image element 43 generating means generates a columnar segment of the respective 44 symbol, there being a predetermined pluralit of said bit 45 series in each group, said bit series each being uniquely 46 accessible by discrete font addresses, the font addresses of 47 those bit series which define adjacent columnar segments of the 48 same symbol differing by a constant amount, 49 translating means responsive to an individua l 50 symbol identifying code accessed from said page memory for 51 deriving data defining a reference font add ess in said font 52 memory associated with the group of data bits associated with 53 the symbol identified by said accessed code, 54 columnar segment counting means for determining 55 the remaining number of said preaeterini ned plurality of bit 56 series to complete the generation of a symbol ,, 57 font memory addressing means for cyclically 58 addressi ng di ff erent ones of said bit series by deriving font 59 addresses from said reference addresses and said remaining 60 .number of said predetermined plurality of bit series, 61 output control means for delivering the bit 62 series addressed by said font memory addressing means to 63 said binary image element generating means in 64 synchronism with the traversal thereof f or di s pi ay i ng the 65 contrast pattern defined by sai d . addressed bit series, and .66 update logic means operated upon access of . 67 the final one of said predetermined plurality of said bit 68 series for modifying the page memory address to be specific ■.;. -··' 69 by advancing by one the associated symbol order position in 70 the associated stage of .-said; register means. - 1 2. Apparatus as defined in Claim 1 wherein an "end of .2. scan" control code may be stored in said page memory at a . 3. storage address therein, said "end of scan" control code 4 identifying a data bit, group in said font memory . formi ng a .'...5 blank space character and wherein the improvement further 6 compr i ses : 7 ° means responsive to detection of said "end of 8 scan" control code being accessed from said page memory for 9 causing blank space generation by said binary image element 10 generating means throughout the remainder of its traversal 11 of a columnar segment. 1 3 Apparatus as defined in Claim 2 wherein the 2 improvement further comprises: · . 3 * means , responsive to detection of said "end of . 4 scan", control code being accessed from-said page memory for ■ ·· 5 inhibiting further cyclic operation of said first page memory 6 °address. con trol means for the remainder cf said traversal of 7 a columnar segment by 'sand binary image element generating '·Η 8 in cans. 1 4. Apparatus as. defined in Claim 1 wherein the storage 2 addresses in said page memory of all symbols to be generated 3 within a given one of said rows differ by a constant number 4' and wherein the improvement further comprises: 5 summing means in sa id .update logic means for ,6 advancing the identification of the order position of the symbol to . be generated in its respective row by one 'by adding 8 said constant number to the page memory address specified by g said regi ster means. 1 5. Apparatus as defined in Claim 1 wherein said rows

2. of. symbols comprise l ines of text and wherein said 3 predetermined plural ity of said bit series in each group is 4 proportioned in number to the d is pi ay width of the symbol 5 whose contrast control pattern is defined thereby, wherein 6 the improvement further comprises 7 said second page memory address control means 8 storing in, each of said data words a numeric indication of the 9 remaining number of said predetermined plurality of bit series 10 required to complete generation, of the symbol whose order 11 position is identified in the data word, 12 said translating means further deri vi ng a 13 .'numerical indication of ; the predetermi ned . pi ura 1 i ty of said 14 bit series in the group identified by the associated reference 15 address " 16 means operative upon the first presentation 17 by said register means of a data word after the advancement 18.',' of -i ts respecti ve .symbol order position by one for recording —4 19 the numerical indication derived from said translating means 20 into the associated stage of said register means, and 21 . ' ■ ■ ■· said columnar segment counting means comprising 22 means to decrement said numerical indication stored in said 23 data word as a. function of the number of operating cycles 24 during which said data word is retrieved from said register 25 means . LE9-73-001 Claim- 5 (cont)