US3444529A - Control adapter assembly for a chain printer - Google Patents

Description

y 3, 1969 R. c. ENGELHARDT 3,444,529

CONTROL ADAPTER ASSEMBLY FOR A CHAIN PRINTER Filed Jan. 5, 19s? Sheet 0r 5 SP HAMMER T BLOCK 2 I i AM I HAMMER 4' 2) 3%?? *4 P2 I "H .7 r. .M ACTUATOR l "PPB JJBLQCK 1 "PP" f .u.

ZEROECEONTROL 253%? FSB "1 I mm X II n C-IC-Z M v w M A CAD I 1001mm. I

I REGISTER M. I I0 A T uhsuulgsn s c COMPARATOR CG 1 88" v m M j "can come GENERATOR MEMORYi W V i (:P M-l I /C(eq C-|,etc

II II 1 till llrsll uhldn INVENTOR ROBERT C. ENGELHARDT ATTORNEY FIG. 2

CONTROL ADAPTER ASSEMBLY FGR A CHAIN PRINTER Sheet oi "-89 use) Pr-P R. C. ENGELHARDT Y Y 2 As INVENTOR. ROBERT C. ENGELHARDT ATTORNEY May 13, 1969 Filed Jan. 5, 1967 uriLoAo MODE SRB y 1969 R. c. ENGELHARDT 3,444,529

CONTEOL- ADAPTER ASSEMBLY FOR A CHAIN PRINTER Filed Jan. 5, 1967 Sheet of 3 L4 R-l WM HAMMER l START OF L2] [2] l1] '3] pogmo lg [E E l \Ai IST SUB-SCAN S -fig *1 H5 R5 I-RG-IF m m m m CHAIN MOVEMENT [a [5] STARTOF 2ND SJB-SCANFRAJ E! Lfi EIEJL. wffis -JEEJEQJ L J 'q Fhi 1 lFa-s 1 mramm mmm STARTOF U1 El EH5 lEJL. ggwms JEN-SHE! 3RD SUB-SCAN l f [a [3'] m CHAIN MOVEMENT IE] '6] a FIG.5

I NVENTOR ROBERT C. ENGELHARDT ATTORNEY United States Patent 0 3,444,529 CONTROL ADAPTER ASSEMBLY FOR A CHAIN PRINTER Robert C. Engelhardt, Waltham, Mass., assignor to Honeywell Inc., Minneapolis, Minn., a corporation of Delaware Filed Jan. 3, 1967, Ser. No. 606,876 Int. Cl. Gllb 13/00 US. Cl. 340-172.5 12 Claims ABSTRACT OF THE DISCLOSURE A control adapter assembly for controlling a special chain printer having a leap-flogging, by-threes printslug registration order (for each full print-position-shift of the chain) providing a buffer storage assembly for accessing memory locations serially, i.e., in print-position sequence, and responsively storing hit signals, while accommodating a non-serial, leap-frogging butter unloading operation for actuating print hammers in this leapfrogging" order. More particularly, this buffer memory uses a resettable latch circuit for each such memory location, each being coupled to control the energization of an associated print hammer, the mode of addressing main memory and filling these locations being controlled so as to accommodate this leap-frogging" unload mode and also a simple two-step reset mode.

Background, features of invention In deriving printed output from computer and other data-handling systems, it is desirable, in certain instances, to use chain printers of a type well known in the art and understood to be arranged to sweep an array of (type) slugs across a prescribed printing plane, the chain thus scanning all print-positions across a print line (of a data medium) at very high speeds so that each type slug successively passes every print-position, and the hammers associated therewith, to be impacted thereby at selected character coded print times. A familiar such printer chain has five identical sets of 48 different type slugs each, scanning these past 132 print-positions in a print line. Each print line of characters is characteristically stored, in coded form and in printing order, in a prescribed memory bank, such as the core matrix in a computer central processor (CPU) memory. As the chain sweeps past each print-position, character coding means conventionally generate character signals identifying successive character slugs passing that print-position, e.g. a code generator supplying, for each print-position, 48 successive different character codes to be compared with the character code in the CPU memory cell corresponding to that print-position.

It is a peculiarity of this type of chain printer that, for efficiency, etc., the type slugs are slightly staggered to register successively with each of the 132 print-positions, so that when a first slug comes into registry with a first print position, for instance, the following l3l slugs will each successively come into registry with 131 different print-positions at different times (before a second slug next registers with that first print-position). It also happens that, again for efi'iciency of operation, etc., the order of these successive registrations, and thus of hammer enabling, is not the aforementioned printing order (i.e., of the physical arrangement of the print-positions), but rather is a leap-hogging one, as detailed below. These organizational sequence differences between the character cells in main memory and the hammer-enabling operation (i.e., printing-order vs. leap-flogging order") is one of the considerations that has heretofore required that the print 3,444,529 Patented May 13, 1969 ICC commands (hit signals) be loaded into buffer memory at one phase of a print cycle; then unloaded (hammers fired) at a different phasethus introducing a rather drastic delay in overall printer operation, slowing printout and, absent extensive added memory and/or control means, preventing continuous operation of the chain printer. The present invention confronts these problems, providing an adapter means arranged to allow such continuous printing, yet requiring a very few simple elements without introducing such expected" disadvantages as requiring extra memory locations, tying-up main memory, or affecting its operational mode or that of the printer itself. Meeting these latter constraints is one of the most surprising features of the invention, as workers in the art can well appreciate. This will become more apparent upon considering the discussion of the prior art below.

Thus it is an object of the invention to meet the aforementioned needs and problems and provide the foregoing and other features and advantages. Another object is to provide a storage adapter arrangement to couple control signals from a memory array ordered in printing sequence to operate an array of print actuators operating in a different, leap-frogging" sequence. A related object is to provide a storage adapter for buffering such a memory array to a chain printer hammer array operating in skiporder. Another related object is to provide such an adapter for a printer having a leap-flogging, by-Ns operating mode, N being the print-position skip between hammer enablings. Yet another object is to provide such an adapter control unit including a by-Ns hit register, with N sub-registers. Still another object is to provide such an adapter for such a printer where the skip (N) is 3 print positions. Still another object is to provide such a control/adapter register using resettable latching cells to store hit signals. Still another object is to provide such an assembly where such a *skipping" unload sequence for the register can overtake the non-skipping loading mode, given conventional control. Still another object is to control such an adapter register so as to begin reloading for the next print cycle during a prescribed portion of a subject unload (printing) cycle. Still another object is to provide such an adapter/control register using conventional latch type circuits. Yet another object is to provide such control wherein said latch circuits may be reset together at a few convenient reset times. Still another object is to provide such control simply using relatively conventional character code generator means, comparator means and hit signal register, together with a simple register control means providing the aforementioned pre-load and reset sequences. Still another object is to provide such a control adapter having each storage location thereof coupled to a respective gate in a fire control block, each gate having its output in turn coupled to the hammer actuator at a respective print-position and also having an input leg thereof coupled to a hammer address block providing the aforementioned leapfrogging" enabling sequence. Still another object is to provide such control over register operation and actuator operation, sequence, etc., respectively, using control means essentially comprised of simple counter means.

The aforementioned objects and features of advantage are provided in a preferred embodiment of the invention, as described below, generally comprising an adapter register, each memory location therein comprising a resettable latch-circuit coupled to a respective print-position gate in a hammer fire control block of a "skip-firing type chain printer, i.e., one where hammer firing is enabled in print-position skipping, i.e., leap-frogging by-threes," sequence for each print-scan (major shift of the chain). Such a fire sequence occurs with each print-scan. These registers are adapted to be loaded from a prescribed printline-associated set of memory locations storing character coded signals therein, the output thereof being character code signals compared for each print-scan in printing order and resultant hit signals being steered into successive print-position-associated latch circuits (cells) in the register. These cells are arranged in three subregisters, each corresponding to one of the sub-scanning skip sequences of successive hammer enabling, this subregister allocation and the loading/unloading control thereof being implemented by a register control unit adapted to begin pre-loading the register cells at a prescribed point in the unloading cycle, to reset cell groups in common at a few convenient times, and to generally control the aforementioned operation of the register.

In the drawings, wherein like reference numerals denote like parts:

FIGURE 1 shows, in schematic block diagram form, an embodiment of the control adapter unit according to the invention as coupled to control a particular skipfiring" type chain printer from a memory bank storing signals for printing a particular line;

FIGURE 2 indicates, in block diagram form, an exemplary one of the hit storage circuits comprising the register of the adapter unit indicated in FIGURE 1;

FIGURE 3 illustrates in highly schematic, fragmentary, form the relative positions of a few exemplary (type font) chain slugs with respect to related print-positions, also indicating the relative coupling relationship of these print-positions to the adapter register of FIGURE 1;

FIGURE 4A is an operational-sequence diagram for the register of FIGURES 1-3 indicated in the foregoing figures, correlating the arrangement and grouping of memory cells therein with various unloading sequences; while FIGURE 4B indicates relatively the same thing for related loading sequences; and

FIGURE 5 very schematically indicates the relative alignment of a few exemplary hammer (print) positions and chain slugs at the start of three successive sub-scans, during each of which the chain executes a skipping series of incremental minor shifts.

General organization FIGURE 1, in a schematic block diagram, shows a print control arrangement 10, i.e. a control interface or adapter system coupling a known type chain printer (actuate-control) arrangement 20 to a known type print command memory bank CP. Printer arrangement 20 includes a chain 2 (including type elements, or slugs It), a strobe detector SP, a hammer block HAM (132 hammer means, one for each print-position along print plane P2) and an associated bank of hammer-actuating solenoids, etc. in an actuator block PPB. Adapter arrangement includes a bank of solenoid switching means in a fire-control block FSB for controllably energizing selected solenoids in PPB, with print-signals PP, responsive to strobe code signals "cp" from a hammer address unit HAD, also including a control register SRB, a register control unit CAD, a character code signal generator CG and compare means C. Adapter 10 serves, generally, to couple the leap frogging operation of block FSB, etc. with the printing order accessing of memory section M-l, the latter customarily comprising part of a central proccssor memory CP. This CP will include print line sets of memory locations, such as the print-line (coded) character signals understood as stored in memory M-l, these comprising the coded character signals for the given line of print. Coded character signals are stored in M1 in the aforesaid printing order, that is the order of disposition of print-positions PrP (1-132). Adapter 10 will access and unload M-l in this natural, printing order, while also controlling printer unit 20, to operate in its own different skip-firing mode as hit-controlled by the output of M-l.

Printer control is generally organized as follows: A printing area PZ including 132 print positions Pr-P (FIG- URE 3') is disposed in operative relation between chain 2 and an associated array of 132 print-hammers in hammer block HAM. Associated actuating means (solenoids) in solenoid block PPB are controlled by associated fire signals pp from firing control (or gating) block FSB to thrust an associated hammer in HAM for printing at the selected position. Block FSB is adapted to gate the energization of a selected one of these 132. actuating means under the timing control of hammer (addressing) control HAD, synchronizng FSB with the successive registering of slugs tt before different print-positions. HAD includes a clock portion CL, adapted to emit clock pulsess cp at prescribed (11 s.) intervals, being initiated (and resynchronized) periodically by a strobe pulse from strobe pick-up SP synchronized with the movement of chain 2. These elements are adapted to characteristically fire the print hammers somewhat serially (rather than all together, in parallel, as in a drum printer) and in the aforementioned peculiar leap frogging, by-threes" (or skipping) firing order. Unit HAD is thus adapted to provide a series of 132 successive solenoid-enabling signals, gated through gating block FSB in the prescribed skipping order for responsive actuation of associated solenoids in energizing solenoid block PPB (when selected by a hit signal coupled from register SRB).

The memory portion of adapter unit 10, i.e. register SRB, comprises 132 memory locations (cells C-l, etc. through C-132) in the form of latching circuits for storing hit bits (1 for each print positionsee circuit LC in FIGURE 2). Unit 10 also couples cell (addressing) control unit CAD, according to the invention, so as to steer-in character-select (hit, no-hit) signals (hs, E respectively) into cells C-l to 0-132, accessing them serially to be filled in printing order" from successive associated character locations in memory bank M4 for this print line. Signals hs, E are coupled through an intermediate compare unit C whose output is controlled by character code generator CG to indicated hits" (he) or no-hits (H), as known in the art. According to the invention unit CAD steers-in these hit-bits at a carefully prescribed cycle time (detailed below) adapted to optimize the unloading of gating block FSB, etc. Unit CG is arranged to generate a code sequence corresponding to the upcoming code array (that is, according to the array of upcoming type fonts tr, about to register with each of the 132 print-positions at this print-scan). The serial input from C to SRB (signals hs, h s), when so steered into cells (3-1 through C-132 (corresponding to respective print-positions Pr-P) will determine whether the hammer at each position will be fired during this printscan, there being 48 such scans (one for each character on chain 2).

Chain printer characteristics The characteristics of the type chain printer 20 that is so usefully controlled according to the invention will now be detailed to illustrate this application thereof, though other analogous non-printing order sequencing multiactuator arrangements may be visualized. As schematically indicated in FIGURE 1, the multi-actuator printer arrangement 20 here comprises the high speed chain printer alluded to above which is, in general, adapted to be controlled by adapter unit 10 in response to character printing signals in exemplary memory bank M1. This chain printer is a familiar such output medium for data processing systems, although other similar types will be recalled by those skilled in the art. Such a printer may be generally understood to comprise a chain assembly 2 driven continuously at high speeds on a pair of sprockets D1, D2, one of the sprockets (D2) being coupled to synchronously emit a strobe output to be read-out by a strobe pick-up SP for thereby providing strobe signals to hammer control unit HAD, and to character generator CG. The activation of a particular selected solenoid means will magnetically thrust an associated hammer means in hammer block HAM through printing zone PZ printingly against a selected one of type-slugs tt that is confronted at that print-position at cent type faces along the type chain is called the typespan. Nominal type span is 50% greater than the print span, but actual type span is about 0.1505 inch. The small difference in length that makes the actual type span greater than the nominal type span exists because the chain travels that particular time. This printer chain 2 (or character a about one mil in every ll microseconds, this period being font ?SSl6mb1z 2) Q11 be recognizeiil as cfornprisgng a pluradlthe priitfselectiltzn time to be used for1 storage inltlerrogaity 0 s ugs c aracters to a s ug astene to an en tion an or ma ing a comparison to etermine t e print less steel tape spanning all print-positions in a print line, time allocation. thus forming an endless moving type font array, One The timing arrangement is as follows: The time recharacter high and 240 characters long. Chain assembly quired for the type to move one-half of a print span is 2 is driven continuously in a horizontal plane at a very called a sub-scan. The time required for three subhigh speed and a selected" character-font thereon is imscans is called a print-scan. The first sub-scan starts pacted by the hammer at the selected print-position, when a type is aligned with the first print position (FIG- pressing the paper form and intermediate ribbon print- 15 URE 5), the second sub-scan starting when a type is ingly against the COHCefIled Slug, as known in the art. The aligned with the second print position, and the third subdescribed alphanumerical high speed printer will be undcrscan starting when a type is aligned with the third print stood as printing 600 lines per minute (including single position. A print-scan thus comprises a first, second and space time) using a 48-character type array (including third sulyscan. During each sub-scan, one-third of the numbers and special characters), having five complete hammers, each in progressing sequence, are optioned, at such arrays on the chain 2 for a total of 240 characters 11 microsecond intervals, to some character in the type per chain. This printer operates with 132 print positions, array, At th nd of a print scan, ach of the ham ers having a horizontal spacing of ten characters per inch, will thus have been optioned to one character in the type though of course various modifications of this and other array. Then, at the end of 48 print scans, all of the hamfeatures in the aforementioned specifications are infermers will have been optioned to a complete type array rabllfI as l ntown 1n Ohe art. I h t t t (with 4:18 type charlacter sr)h. Thfereftgre, 48 print-scanfs 6are e prm mg m e is serra one c arac er a one prtn require to print a me. us, or t e printing rate 0 00 position followed by another (not adjacent) character at lines per minute (type moves at 90 in./sec.) a sub-scan another print position, and proceeding in the mentioned i 555 mi roseconds, a ri tan i 1655 microseconds e p-fl gg ng, y I l'eeis? or skipping quence of lug and a print-line is about 80 milliseconds. Normally, a alignment th punt-positions (see FIGURE 5 and Table clock in the system (CL) is started (resynchronized by Ifor illustrated example of seouence).This leap-frogging SP) at the beginning of each sub-scan and is stopped in by-threes order of slug registration may be illustrated each sub-scan after 44 positions are scanned (for 132- as follows: position print line) and have had an option to print. This At hammer #1, followed by every third hammer (4, 7 allows the system and the punter chain to be resynt0 n at hammer #2 followed by every third chromzed for each sub-scan so that any slight difference 1hammer 2 L0 131); Ea2d9iit1EI1l;i;)h3LIl1I #3 followed in thetrglatiolp of the lgammerrgnit to titlebtype arrayeig yevery 1r ammer o 15 sequence is re correce wit every su -scan. us, it wi eappreciat peated 48 times (for the 48-character array described) to h t th physical d i f h i i mechanism print a single line, insuring that every print-position 4U quires the aforementioned leap frogging printing sehammer has been exposed to one complete type array. quence, by-threes, that is, by every third hammer Thus, With this alphanumericfll 132-Position P (every second type character). The system circuits must there are 6336 possible print selection times (options to id tl b designed t accommodate th h i l print); however, at most only 132 of these being used to operation f h im print a line. During each of these times, storage locations FIGURE 5 may b understood to b a plot f a theme. are addressed tohdetermine the characgfr 1; storage corr cal location of type in relation to hammers, remembering spfmdmg to eac f 1905mm" 1 t opflons that the chain travels about one mil in an 11 microsecond prmt, one, arad on one, is used tg se eflt 3 Til f P period and also noting the aforementioned relationship no? n tl inc t a c aractirfis tot e p t -o T 3 of print span to type span. Actual cases may differ slightly, ca e a Oca mg a o a pm] 51 a but any actual differences will be reconciled after each causes the hammer to fire at a controlled tlme, when the sub-scan by the aforementioned resynchronizing of the character (sing) to be prlnted IS registered with the selecmd print position as system to the chain. Thus, FIGURE 5 schematically re- The hammers (and print positions) are Spatially presents the relation of the chain to the hammers at three lated to the type slugs rt, as follows (example in FIGURE Speclfic pomts ln.nme.namely the bagmmng of each glib- 3 and FIGURE 5): the distance between the first and the J Scan for one emlre f Table I j' be used Wlth last print position (1-132) is called the line-span. The FIGURE 5 for l fy hflmlflfir The distance between adjacent print positions is called the mg q n and chem g. Dlstanccs R n print-span (here 0.1 inch). The distance between adja- URE 5 are exemplarily indicated in Table 11, below.

TABLE I Storage location Cumulative addressed Character Print chain move- (in Bank optioned H ammer option merit (in.) M-l) if present position First Sub-Scan. 1s 11 1 1 2nd .001 4 3 4 .002 7 5 7 R S 22;; 130 C 130 VH8 c c a V y v c cl Scond Sub-Scan 45th 50s 2 2 2 46th. 0515 5 4 5 47:11. 0525 s 0 s R S 88th. 022 5 131 D 131 nc a c c c c a c a c TiiirriSub-Scan. 89th .im a 3 3 90th .102 a 5 a 91st .103 9 7 9 1321td. .144 132 "E" 132 TABLE II Segment (R): Distance (in.) R-l 13.2 R2 0.0505 R3 0.001 R-4 0.1505 R-S 0.043 R-6 0.0935 R-7 0.144 R-8 1.0

To summarize, in order to print one line of information, each hammer must be given the option to print all 48 characters. It takes three sub-scans to have all 132 hammers optioned to print one character, this being called a complete scan. It takes 48 print scans to make one print line and 144 sub-scans. It takes 6336 print options to print a line of information.

Novel adapter un it As indicated rather generally in FIGURE 1, adapter unit 10 mates the aforedescribed chain printer assembly to the relatively conventional memory bank M1. The elements and operation of adapter unit 10 may be understood to have the following structural and operational characteristics. Storage means (register) SRB is the focal point of adapter 10 and will be generally understood to have 132 memory cells (C-l through C 132) filled with 132 hit signals (Ins, 71?), one for each print position for each of the 48 print-scans. SRB is so filled each time a particular slug tr shifts one full print position. It will be recognized, as aforedescribcd, that each print-position will have one slug registered therewith every complete print-scan (i.e., every three sub-scans or every 132 incremental chain-shifts) but each slug tr will register with some one print position every other subscan. Note that each slug registers with a different corresponding print position successively and at a slightly different time, doing so according to the aforedescribed by-threes" sequence. During each print-scan, it will be recognized that three sub-scans will successively occur in the by-threes" sequence, being sequence controlled by HAD through the gates in gate block FSB as described. Thus, in effect, during the time that a slug has shifted one complete print position, adapter memory SRB has been loaded from memory M-l through comparator C in all 132 storage cells C1-C132, serially; therewhile being also serially unloaded in the by-threes order.

How the aforementioned loading and unloading modes of register SRB are effected according to the invention will be described in more detail below. However, it may be generally understood that address control CAD provides control signals to start the loading at the proper time and HAD the unloading at its proper time. Unit HAD also controls the reset time for cells C-l, etc., in SRB, controlling CAD to reset a first portion thereof at a first selected time (when C-S is just unloaded) and then to reset the remainder at second selection time (when C-l32 is just unloaded). As explained below, this first portion comprises the cells in SR1, SRII and through C-S in S RIII according to the invention. Thus HAD may preferably include an array of counters to, once started by strobe SP, responsively count successive chainshift times and indicate the described by-threes registration order at the hammer actuator gates in PSB. The unloading of SRB is thus effected in a prescribed controlled manner to apply print (or hit) signals lzs" to respective sequential ones of the 132 gates in block FSB. The loading of SRB is also novel and effectively comprises running the 132 print position locations in memory through comparator C where the coded character signals "cs" for each of these print positions are successively compared to associated ones of the upcoming" array of character code signals for the corresponding 1 32 slugs tr about to register, sequentially, during this upcoming print-scan time. This code pattern is generated by codegenerator CG in response to a starting strobe pluse ss from pick-up SP, as known in the art. Thus, generator CG is adapted to generate 48 different sets of 132 coded character signals, each character set comprising a different sequence of 132 character codes, one for each printposition according to the type character coming up there. CAD preferably includes an array of counters which, when initiated (at C-S time by signal ms"), addresses cells C-l, etc., in printing-order succession, coupling them to the synchronously controlled operation of compare unit C, generator CG and memory contents M-1 to store hit or "no-hit" signals therein for this print-scan (likewise for all 47 other scans).

As indicated in FIGURE 2, each of the 132 memory locations C in register SRB preferably comprises a latched type memory circuit LC. Circuit LC includes an input gate Gl having a plurality of address legs ad, plus a hit leg tl, for application of hit signals from comparator C as aforedescribed. Gate 6-1 is coupled to the input of an amplifier A, a known gate buffer type amplifier, such as provides sufficient signal gain to derive the needed logical fan-out. The h0ld" function of this circuit is performed at a second gate G2 to one leg of which the output from amplifier A is fed back to initiate a hold signal hid until reset" is signaled at rs. G2 may be characterized as an inhibit gate whereby the prescribed reset signal rs may be applied to terminate output hold signal hId."

Prior art A number of alternatives to this control system exist in the art, all more complex, expensive and unwieldy than using merely the disclosed hit register SRB. However, such a register will be seen to be faced with a problem of transposing from the aforementioned printing order sequence of loading and the aforementioned different skipping unloading sequence (firing order). As stated, hammers are fired in a by-threes fire order, that is, the hammers/ print positions are fired in the following of print positions (FIGURE 3): First position # 1, 4, 7 etc. through next, position # 2, 5, 8 etc. through position 131; finally, position # 3, 6, 9 etc. through the last position 132.

For example, FIGURE 3 illustrates this by-threes firing order (sequence of slug registry across print positions 1 through 132). By way of illustration and proceeding across chain 2 from right to left, it will be noted that the successive type slugs (upcoming slugs rt) have been designated as It-1, tt-2, t etc., concluding with tt-87, tt-88 and tt89 (registration of these last slugs calling up the 43rd, 88th, and 132nd print-options, respectively). As aforementioned, the peculiar successiveregistry disposition of slugs It on claim 2 is responsible for this. Thus, it will be understood that character A comprising slug tt-l is, now, exactly registered for firing opposite print position (Pr-P) #1.

The hammer at Pr-P#l will now be fired if, and only if, character A is to be printed at position 1 on the subject print line. All other slugs are out of registry, e.g. slug tt-89 will be seen to register successively with each of the 132 Pr-P in order, there being however, in general, 88 different sub-shifts between each successive registration for any one slug. Thus, a number of scans, corresponding to the number of characters available, will be performed. The next registering slug will be slug tt-3 (character C) about to come into registry with print position #4. Continuing, it will be understood that the succeeding slugs (tr-S next, then 11-7, etc.) will come up successively at prescribed print-positions (at Pr-P #7, then Pr-P #10 etc.) in the described skipping manner concluding with Pr-P 130 (1: 87 there) in the first subscan group, thereafter continuing into the second, bythrees sub-scan group of successive registrations (be- 9 ginning at Pr-P#2, tt-2, i.e. B there; then Pr-P#5 concluding with Pr-P#131, slug "-88 there); and lastly, following with the registrations of the third sub-scan group in like manner, (i.e. at Pr- P#3, tt-3 there-concluding with PrP#132, 439 there).

Accordingly, it will be seen that each one of these sequential sub-groupings of the 89 fonts it coming up for registry with print positions 1 through 132 will have been registered as hits or no-hits in SRB for this scan. Further, it will be seen that according to the invention, register SRB has been sub-divided into three subregisters SRI, SRII, SRIII, the print positions for each sub-register coming up for firing successively within each group and successively by groups (i.e. SRI group first, then SRII etc.). It will appear then that the fire order for print positions 1 through 132 has been divided into three sub-groups, namely positions 1, 4, 7 through 130 (see SRI), positions 2, 5, 8 through 131 (see SRII) and positions 3, 6, 9 through 132 (see SRIII). One advantage to such an arrangement is that the adapter register, SRB comprising SRI etc. can allow individual hit-cells," C-1, etc. to be readily loaded and to be unloaded in this peculiar by-threes sequence. That is, with cells C-l etc. being in printing order," control means CAD will, in effect, skip from SRI to SRII to SRIII repeatedly over and over, filling SRB in regular sequence (C-1, C-2, C-3 but allocating signals to each sub-register SR in skipping sequence (C-1, C-4 etc. in SRI etc.) and filling the sub-registers SR at the same rate. For example, considering first sub-register SRI, one would first load cell C-l (with a hit" signal corresponding to print position #1), then cell C-4, then C-7 etc. through cell C-130. At the same time SRII will be filling beginning with -2, then C-5 etc. through C-131. Furthermore, althrough the total time for loading the entire register SRB is much less than that for unloading it (800 s, of 6 [15. per cell, vs. 1700 .s., or 11 [1-5. per cell plus delay intervals), the skipping by-threes organization makes the time for loading a particular sub-register longer than that for unloading it. Hence, for sub-register SRI, for instance, if unloading were to start a few microseconds after loading started, it would soon overtake the loading since successive cells are loaded every 18 s, but unloaded every 11 us. This cannot be permitted, of course; hence, loading must be given a prescribed lead time.

Problem I This slow fill time for each sub-register gives rise to one major problem solved by the invention. As indicated in FIGURE 4A when sub-registers SRI and SRII have unloaded serially and sub-register III is only partly unloaded in a given print-scan sequence (first unload mode M loading for the following print-scan sequence is made to begin early (second load made M so that unloading of SRIII and, thereafter, of SRI (second unload mode M these follow one another with practically no delay since scans are printed continuously) cannot overtake the loading of SRI and prevent continuous printing. Since printing according to the invention is to proceed continuously between scans, one cannot, as in the prior art, Wait until one scan is printed before starting to load for the next scan. However, the control system is resynchronized with the chain between sub-scans, i.e. between the unloading of SRI and SRII, SRII and SRIII, SRIII and SRI. Thus, as a feature of the invention a "start cell (0-8) is selected somewhat along sub-register SRIII such that the time for unloading the rest of SRIII and, thereafter, of SRI is sufficient to allow completing the loading of SRI. That is, C-S must be selected to leave a prescribed number of cells NL yet to be unloaded (N-U already unloaded) so that the time to unload the remaining cells (NL; the last in order being C432) and, then, to unload the cells in SRI (that is N is sufficient to allow loading all of the cells (M in SRI (plus any delay intervals).

1 0 Problem 2 However, due to the peculiarity of the latch type storage means (of. FIGURE 2) comprising the cells (C1, etc.) of register SRB, each latching cell (circuit) must be reset before it can be reloaded, presenting a rather sticky reset problem, whose constraints are relatively opposite those of the above slow load problem. That is, it is very messy and expensive to reset the cells individually and not as a group. Thus, although the unloaded cells N-U at the time C-S is selected may all be conveniently reset together, at a first reset time, there is some problem with resetting the rest of the cells in register SRIII, namely cells NL. Cells NL should be reset together as a group since it is impractically complicated to reset individually as they are unloaded. To illustrate the problem, note that if cells NL are unloaded and not immediately reset after unloading the last in this group (C-132) but only after some (unknown) delay which allows the loading process to reach the first few cells in Group NL, then two problems arise: (1) those cells which the loading process reached could not be properly loaded since they have not first been reset and (2) if these cells had been properly loaded, the information loaded will all be erased by subsequent reset. Thus, it was determined that loading must begin late enough to assure that the unloading cells NL will be reset together, before loading reaches them and that the start cell C-S must therefore be somewhat adjusted in location from the above so as to be far enough along register SRIII so that it is entirely unloaded by the time the filling process starts to load C-S (if not before).

Combining these two constraints, we now have a formula for selection of the range of times (or possible start cells in SRIII) for initiating the loading, that is, such times must be:

(1) Late enough (or cell C-S far enough along SRIII) so that SRIII is unloaded completely when the loading process reaches that selected cell C-S; and

(2) Soon enough (or C-S not so far along SRIII) that the unloading of SRI does not overtake the loading thereof, also taking unload-delays into consideration (e.g. delay for resynchronizing, though this is variable) as well as load-delays (such as CP being busy, etc.).

(3) Thus, for simplicity, it appeared convenient to initiate the loading process as soon as possible (especially because of possible delays, such as a busy CP, etc.) and thus, in the preferred case, to select a time (or start cell" C-S) so located as to just allow SRIII to be unloaded when the loading reached that cell.

Thus, a second reset operation can be timed to conveniently, and safely, reset all remaining cells (NL) together if it is initiated at the loading C-S-l time, locating C-S so that this coincides with C-l32 just unloaded time. (That is, T made equal to T by selected location of C-S.)

It will be apparent to those skilled in the art that the principles of the present invention may be applied to diiferent'embodiments from that shown using analogous elements, etc. While in accordance with the provisions of the statutes, there have been illustrated and described the best forms of the invention known, it will be apparent to those skilled in the art that changes may be made in the elements disclosed without departing from the spirit of the invention as set forth in the appended claims and that, in some cases, certain features of the invention may be used to advantage without a corresponding use of other features.

Having now described the invention, what is claimed as new and for which it is desired to secure Letters Patent 1. In a data processing output arrangement for marking a record medium along prescribed lines and columns thereof, said arrangement including a reference cycling means; a plurality of marking units arrayed in a prescribed linear order across a prescribed marking plane,

each said unit comprising a marking means adapted to mark a respective column location on said medium and also on associated control means for controlling the energization' thereof, the associated control means being adapted for successive enabling of said marking means in a prescribed skipping sequence, different from said linear order and so that every Nth marking means is enabled in N enabling sub-scans for each mark scan between each full incremental shift of said cycling means; also said arrangement including a prescribed memory means comprising a plurality of memory banks, each bank comprising a plurality of memory locations, each location having an encoded mark command stored therein for enabling a respective one of said marking means during one of said mark scans, said commands being encoded according to the condition of said cycling means during the prescribed mark scan, the combination therewith of an improved adapter control means adapted to interrogate said stored commands in said linear-order to control the energization of said associated marking means, said control means comprising:

code generating means adapted to monitor the cyclical condition of said cycling means and responsively generate a prescribed array of position-coded signals for each said incremental shift, said signals corresponding to said commands at a respective print scan; mark unit address means adapted to sequentially enable said control means responsive to the condition of said code generating means output in said skipping sequence; comparator means connected to receive said code generating means output; storage register means including a plurality of memory cells, each cell having its output coupled to a respective one of said control means for enabling thereof upon correspondence between a respective one of said position-encoded signals, and a respective command in an associated memory location; and register accessing means adapted to sequentially control the comparison of the contents of each memory location with a respective current one of said position coded signals at said comparator in said linear order and responsively inject hit signals in the corresponding one of said cells indicative of said correspondence; said accessing means also being arranged to order and time its operations upon said cells compatible with said skipping marking sequence.

2. The combination as recited in claim 1 wherein said cells comprise resettable storage circuits and wherein said register accessing means includes counter means adapted to successively access and control said cells in N sub-register groups for storage and resetting functions.

3. The combination as recited in claim 2 wherein said register accessing means is adapted to begin loading said cells with a given line set of said hit signals a prescribed lead time prior to conclusion of the prior mark scan and is also adapted to reset said cell circuits in sets at prescribed times so that these sets are related to said N sub-register groups.

4. The combination as recited in claim 3 wherein said marking unit array comprises an array of chain printer hammer means and associated control means; wherein said cycling means comprises a printer chain having a plurality of continually shifting type slugs thereon; and wherein said skipping marking sequence proceeds to unload said register cell circuits, faster, in a single sub-scan, then they can be loaded.

5. The combination as recited in claim 4 wherein said skipping comprises skipping every two hammer positions for enabling every third hammer means and wherein said accessing means accordingly operates said cells in three sub-register groups.

6. The combination as recited in claim 4 wherein said chain printer includes strobe means arranged to signal shifts of said chain and also hammer address means adapted to so skip-sequence the enabling of respective hammer means responsive to said strobe means signals; and wherein said hammer control means each include print hammer actuator means and associated AND gate means for controlling energization of said actuator means, each said gate means being coupled to said hammer address means and a respective one of said register cell circuits for energizing said associated actuator means upon coincident enabling output therefrom; and wherein said code generating means is adapted to generate linear-order code sets synchronous with said stroke means signals and .indicative of respective type slugs past then registered with the respective print hammer positions.

7. The combination as recited in claim 6 wherein each of said memory banks comprises a portion of a central processor memory; wherein said hammer addressing means includes a prescribed counter means for enabling said AND gate means in said by-threes sequence to thus provide three skipping sub-sequences for each said full position shift of said chain.

8. The combination as recited in claim 7 wherein said register cells each comprise a resettable latch circuit; wherein said register accessing means includes counter means adapted to indicate a point in a subject skipping mark scan sequence for beginning the following load operation and for referencing reset time for said latch circuits.

9. The combination as recited in claim 8 wherein said register accessing means is adapted to begin a following load operation at a prescribed start cell and start time occurring when the time for finishing a subject skipping print scan sequence is approximately equal to the time necessary to load those of said cells in the initial subregister group.

10. The combination as recited in claim 9 wherein said register accessing means is adapted to reset all said unloaded latch circuits up to said start cell at said start time, thereafter resetting the rest of said cell circuits upon compleion of said subject print scan sequence.

11. In a chain printer control arrangement for controlling a prescribed array of print impact means arrayed across a prescribed print-line segment in a prescribed linear order and arranged to be sequentially enabled in a different skip every Nth impact means sequence according to the coded print signals in a prescribed bank of linesprinting memory locations corresponding in number and order to said linear order and including a character code generator providing a linear-ordered array of output code signals corresponding to the upcoming type slugs at respective print positions; an adapter arrangement in combination therewith for controlling said impact means responsive to correspondence between said print signals and said code signals, said arrangement comprising:

a storage register comprising a plurality of memory cells, each cell being coupled between said code generator means and a prescribed one of said impact means for enabling thereof with hit signals indicating said signal correspondence; register control means adapted to operate upon said memory cells according to N sub-register groups thereof in accordance with each sub-scan in said skipping impact operation; said control means being adapted to begin a following load operation at a prescribed start cell and start time accurring when the time for finishing a subject skipping print sequence is approximately 13 equal to the time necessary to load those of said cells in the initial sub-register group.

12. The combination as recited in claim 11 wherein said register cells each comprise a resettable latch memory circuit; wherein said N sequences and sub-register groups comprise three; and wherein said register control means is adapted to reset all of said cell circuits up to said start cell at said start time, thereafter resetting the rest of said cell circuits upon completion of said subject printing sequence.

1 4 References Cited UNITED STATES PATENTS PAUL J. HENON, Primary Examiner.

RAULFE B. ZACHE, Assistant Examiner.

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