IL275859B1 - Method and device for improving bandwidth utilization in a communication network - Google Patents
Method and device for improving bandwidth utilization in a communication networkInfo
- Publication number
- IL275859B1 IL275859B1 IL275859A IL27585920A IL275859B1 IL 275859 B1 IL275859 B1 IL 275859B1 IL 275859 A IL275859 A IL 275859A IL 27585920 A IL27585920 A IL 27585920A IL 275859 B1 IL275859 B1 IL 275859B1
- Authority
- IL
- Israel
- Prior art keywords
- data packet
- descriptors
- metapacket
- nic
- smart
- Prior art date
Links
- 238000004891 communication Methods 0.000 title claims description 16
- 238000000034 method Methods 0.000 title claims description 7
- 230000032683 aging Effects 0.000 claims 1
- 238000001152 differential interference contrast microscopy Methods 0.000 description 26
- 230000006855 networking Effects 0.000 description 9
- 230000005540 biological transmission Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000005641 tunneling Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/90—Buffering arrangements
- H04L49/9063—Intermediate storage in different physical parts of a node or terminal
- H04L49/9068—Intermediate storage in different physical parts of a node or terminal in the network interface card
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/382—Information transfer, e.g. on bus using universal interface adapter
- G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/90—Buffering arrangements
- H04L49/901—Buffering arrangements using storage descriptor, e.g. read or write pointers
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/12—Protocol engines
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/22—Parsing or analysis of headers
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/30—Definitions, standards or architectural aspects of layered protocol stacks
- H04L69/32—Architecture of open systems interconnection [OSI] 7-layer type protocol stacks, e.g. the interfaces between the data link level and the physical level
- H04L69/321—Interlayer communication protocols or service data unit [SDU] definitions; Interfaces between layers
Description
METHOD AND DEVICE FOR IMPROVING BANDWIDTH UTILIZATION IN A COMMUNICATION NETWORK TECHNICAL FIELD The present disclosure relates generally to the field of communication network throughput, and in particular, to a device and a method for alleviating bottlenecks in communication networks, thereby enabling achievement of an increase in the communication systems' throughput. BACKGROUND Every computer included in a data network, operating either as a client or as a server, requires a network interface card (hereinafter "NIC") in order to access the network. A NIC is usually a separate adapter card that is mounted onto one of the server’s motherboard expansion slots. However, most newer computers have the NIC built into the motherboard, in which case a separate card is not required. For a client computer, one may use an inexpensive built-in NIC, because a client computer is used to connect only one user to the network, contrary to the use of a NIC in a server computer which connects many network users to the server. Smart NICs may be used in cloud data center servers to boost performance by offloading CPUs in servers by performing network datapath processing. With the recent shift in cloud data center networking driven by software-defined networking (SDN) and network functions virtualization (NFV), a new class of offload NIC is needed - namely a smart NIC. Specifically, there are three major reasons for which a smart offload NIC, or a smart NIC, would be required: 30 1) The complexity of the server-based networking data plane has increased dramatically with the introduction of overlay tunneling protocols such as VXLAN, and virtual switching with complex actions. 2) Increasing network interface bandwidths means that performing these functions in software creates an untenable load on the CPU resources, leaving little or no CPU left over to run applications. 3) A key requirement of SDN is that the networking data plane must remain fungible, so fixed-function offload technologies cannot be applied. Data networking involves both hardware and software. On the software side, networking protocols are often designed for current (or near-term) hardware capabilities. Protocols often become widely adapted while at the same time networking hardware improves. Processors become more efficient while communication mediums gain reliability and increased capacity. However, over time, networking protocols may become less suitable for the hardware that is being developed. Moreover, some capabilities of networking hardware have not been fully appreciated and realized. Smart NICs, for example FPGA (Field Programmable Gate Array) NICs, have become more common. These newer interfaces, like traditional NICs, provide physical and media connectivity. They also include additional processing capability, sometimes in the form of reconfigurable circuitry (e.g., FPGAs). These processing-augmented NICs may allow features of some protocols to be offloaded from the host's CPU (Central Processing Unit) to the NIC. Some smart NICs may even allow an entire transport protocol to be fully offloaded from a host's CPU to the smart NIC. However, this approach often requires significant host-side changes. For example, host-side software might need to be re-written in order to enable communicating directly with its NIC via a custom application programming interface (API) rather than via a standard transport protocol. US 20160381189 describes a smart NIC with features that enable the smart NIC to operate as an in-line NIC between a host's NIC and a network. The smart NIC provides pass-through transmission of network flows for the host so that packets sent to and from the host would pass through the smart NIC. As a pass-through point, the smart NIC is able to accelerate performance of the pass-through network flows by analyzing packets, inserting packets, dropping packets, inserting or recognizing congestion information, and the like. However, the main bottleneck in network applications is generally the I/O bandwidth. In a case wherein NICs are installed in servers, it is the PCI (Peripheral Component Interconnect) bandwidth that limits the maximal throughput of the system. A conventional PCI is a local computer bus used for connecting hardware devices in a computer. PCI is part of the PCI Local Bus standard. The PCI bus supports the functions found on a processor bus but in a standardized format that is independent of any particular processor's native bus. The present disclosure seeks to solve the drawbacks described above.
Claims (13)
1.WHAT IS CLAIMED IS: 1. A communication system comprising at least one smart network interface card ("NIC") provided with a logic/programmable processor and a local memory, and a computing element, wherein a communication bus is used to connect said smart NIC and said computing element to enable forwarding data there-between, wherein said system is characterized in that said smart NIC is configured to receive a data packet, to extract metadata therefrom, wherein said metadata resides within said data packet header and/or at one or more specific locations within the data packet payload, place the extracted metadata into a descriptors MetaPacket structure, and forward the descriptors MetaPacket structure, to said computing element along said communication bus, thereby forwarding less than all of said data packet to said computing element; and wherein said system is further characterized in that the computing element is configured to process said descriptors MetaPacket structure and to return the processed descriptors MetaPacket structure to the smart NIC.
2. The system of claim 1, wherein upon receiving the processed extracted metadata, said smart NIC is further configured to extract a respective data packet that had been stored at the local memory and re-write a header of the retrieved data packet according to the processed metadata.
3. The system of claim 1, wherein a plurality of the received data packets is stored at said local memory of the smart NIC.
4. The system of claim 1, wherein the dedicated descriptors comprise one or more members of the group that consists of: (1) the memory location of where the packet was stored, (2) timestamps, (3) statistics, and (4) packet validity flags.
5. The system of claim 1, wherein the smart NIC processor is further configured to receive a plurality of data packets and to identify one or more data packets from among the plurality of data packets received, for which an entire content is required, and to forward the entire content of said identified data packets towards the computing element.
6. The system of claim 1, wherein the smart NIC processor is further configured to apply an aging mechanism to packets that are stored at the local memory of said smart NIC.
7. The system of claim 1, wherein upon processing a descriptors MetaPacket structure by a software application residing at the computing element, the processed descriptors MetaPacket structure is forwarded along a reverse path of said communication bus, to be used by the smart NIC processor in extracting a corresponding data packet from the local memory and processing the extracted corresponding data packet according to the descriptors comprised in the processed descriptors MetaPacket structure.
8. The system of claim 1, wherein upon determining in accordance with updated information contained in the descriptors MetaPacket structure that the data packet should be forwarded from the smart NIC through an egress port which is other than an ingress port via which that data packet was received, forwarding the data packet to a driver which in turn forwards the data packet to an appropriate egress port.
9. The system of claim 1, further comprising a driver configured to support two modes of operation, a transparent mode and an explicit mode.
10. A communication system comprising at least one smart network interface card (“NIC”) provided with a logic/programmable processor and a local memory, and a computing element, wherein a communication bus is used to connect said smart NIC and said computing element to enable forwarding data there-between, wherein said system is characterized in that said smart NIC is configured to receive data packets, to extract data therefrom and to forward less than all data comprised in the received data packets, to said computer element along said communication bus, wherein said communication system further comprises a driver configured to support two modes of operation, a transparent mode and an explicit mode, and wherein the driver is configured to reconstruct MetaPackets by using metadata associated therewith, while leaving the remaining of the packet nullified.
11. The system of claim 10, wherein said driver is further configured to forward MetaPackets to a smart NIC, which in turn is configured to operate on MetaPackets received from the driver.
12. A method for use in a communication system that comprises at least one smart network interface card ("NIC") provided with a logic/programmable processor and a local memory, and a computing element, and wherein a communication bus is used to connect said smart NIC and said computing element to enable forwarding of data there-between, said method comprises the steps of: (i) extracting metadata from a data packet that arrives at the smart NIC and placing the extracted metadata into a descriptors MetaPacket structure; (ii) forwarding the descriptors MetaPacket structure to a software application CPU; (iii) processing the descriptors MetaPacket structure by the software application CPU and returning the processed descriptors MetaPacket structure to the smart NIC; (iv) retrieving a respective data packet that has been stored from the local memory; (v) re-writing the data packet's header according to updated metadata; and (vi) forwarding the data packet via an egress port.
13. The method of claim 12, wherein said descriptors MetaPacket structure comprises at least one of: a data packet's header and an address within the local memory of the stored data packet. For the Applicant, By:
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201862622913P | 2018-01-28 | 2018-01-28 | |
PCT/IL2019/050075 WO2019145938A1 (en) | 2018-01-28 | 2019-01-19 | Method and device for improving bandwidth utilization in a communication network |
Publications (2)
Publication Number | Publication Date |
---|---|
IL275859A IL275859A (en) | 2020-08-31 |
IL275859B1 true IL275859B1 (en) | 2024-01-01 |
Family
ID=67394930
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IL275859A IL275859B1 (en) | 2018-01-28 | 2019-01-19 | Method and device for improving bandwidth utilization in a communication network |
Country Status (4)
Country | Link |
---|---|
US (1) | US11444890B2 (en) |
EP (1) | EP3744066A4 (en) |
IL (1) | IL275859B1 (en) |
WO (1) | WO2019145938A1 (en) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP7087807B2 (en) * | 2018-08-08 | 2022-06-21 | 日本電信電話株式会社 | How to increase the network bandwidth of servers, server systems and servers |
US11150963B2 (en) * | 2019-02-28 | 2021-10-19 | Cisco Technology, Inc. | Remote smart NIC-based service acceleration |
US11245762B1 (en) * | 2021-05-19 | 2022-02-08 | Red Hat, Inc. | Data request servicing using smart network interface cards |
US11671350B1 (en) * | 2022-08-15 | 2023-06-06 | Red Hat, Inc. | Data request servicing using multiple paths of smart network interface cards |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
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US7346701B2 (en) * | 2002-08-30 | 2008-03-18 | Broadcom Corporation | System and method for TCP offload |
US7813342B2 (en) | 2007-03-26 | 2010-10-12 | Gadelrab Serag | Method and apparatus for writing network packets into computer memory |
US8121135B2 (en) | 2009-06-23 | 2012-02-21 | Juniper Networks, Inc. | Discovering path maximum transmission unit size |
US8640220B1 (en) | 2009-09-09 | 2014-01-28 | Amazon Technologies, Inc. | Co-operative secure packet management |
EP2574000B1 (en) * | 2011-09-22 | 2020-04-08 | Xilinx, Inc. | Message acceleration |
US9559982B2 (en) * | 2014-02-28 | 2017-01-31 | Cavium, Inc. | Packet shaping in a network processor |
US9692698B2 (en) | 2014-06-30 | 2017-06-27 | Nicira, Inc. | Methods and systems to offload overlay network packet encapsulation to hardware |
IL238690B (en) | 2015-05-07 | 2019-07-31 | Mellanox Technologies Ltd | Network-based computational accelerator |
US9888095B2 (en) | 2015-06-26 | 2018-02-06 | Microsoft Technology Licensing, Llc | Lightweight transport protocol |
US10608992B2 (en) | 2016-02-26 | 2020-03-31 | Microsoft Technology Licensing, Llc | Hybrid hardware-software distributed threat analysis |
PT3616368T (en) | 2017-04-25 | 2021-06-11 | Drivenets Ltd | A virtual provider edge cluster for use in an sdn architecture |
JP7110243B2 (en) | 2017-05-28 | 2022-08-01 | ドライブネッツ リミテッド | Provision of services in telecommunications networks |
US11294688B2 (en) | 2017-06-16 | 2022-04-05 | Drivenets Ltd. | Parallel information processing on multi-core computing platforms |
US11425003B2 (en) | 2017-08-03 | 2022-08-23 | Drivenets Ltd. | Network aware element and a method for using same |
US20190044809A1 (en) * | 2017-08-30 | 2019-02-07 | Intel Corporation | Technologies for managing a flexible host interface of a network interface controller |
PT3698520T (en) | 2017-10-17 | 2024-03-27 | Drivenets Ltd | A communication routing system |
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2019
- 2019-01-19 WO PCT/IL2019/050075 patent/WO2019145938A1/en active Application Filing
- 2019-01-19 US US16/964,090 patent/US11444890B2/en active Active
- 2019-01-19 EP EP19743708.0A patent/EP3744066A4/en active Pending
- 2019-01-19 IL IL275859A patent/IL275859B1/en unknown
Also Published As
Publication number | Publication date |
---|---|
EP3744066A1 (en) | 2020-12-02 |
WO2019145938A1 (en) | 2019-08-01 |
US20200351222A1 (en) | 2020-11-05 |
IL275859A (en) | 2020-08-31 |
EP3744066A4 (en) | 2021-06-16 |
US11444890B2 (en) | 2022-09-13 |
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