IL156482A0 - Parallel electronic architecture comprising a plurality of processing units connected to a communication bus, and addressable by their functional capabilities - Google Patents

Parallel electronic architecture comprising a plurality of processing units connected to a communication bus, and addressable by their functional capabilities

Info

Publication number
IL156482A0
IL156482A0 IL15648201A IL15648201A IL156482A0 IL 156482 A0 IL156482 A0 IL 156482A0 IL 15648201 A IL15648201 A IL 15648201A IL 15648201 A IL15648201 A IL 15648201A IL 156482 A0 IL156482 A0 IL 156482A0
Authority
IL
Israel
Prior art keywords
addressable
processing units
communication bus
units connected
functional capabilities
Prior art date
Application number
IL15648201A
Other languages
English (en)
Original Assignee
Wany S A
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Wany S A filed Critical Wany S A
Publication of IL156482A0 publication Critical patent/IL156482A0/xx

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
IL15648201A 2000-12-22 2001-12-21 Parallel electronic architecture comprising a plurality of processing units connected to a communication bus, and addressable by their functional capabilities IL156482A0 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0016858A FR2818774B1 (fr) 2000-12-22 2000-12-22 Architecture electronique parallele comportant une pluralite d'unites de traitement connectees a un bus de communication, et adressables par leurs fonctionnalites
PCT/FR2001/004176 WO2002052414A1 (fr) 2000-12-22 2001-12-21 Architecture electronique parallele comportant une pluralite d'unites de traitement connectees a un bus de communication, et adressables par leurs fonctionnalites

Publications (1)

Publication Number Publication Date
IL156482A0 true IL156482A0 (en) 2004-01-04

Family

ID=8858068

Family Applications (1)

Application Number Title Priority Date Filing Date
IL15648201A IL156482A0 (en) 2000-12-22 2001-12-21 Parallel electronic architecture comprising a plurality of processing units connected to a communication bus, and addressable by their functional capabilities

Country Status (10)

Country Link
US (1) US6859847B2 (xx)
EP (1) EP1344131A1 (xx)
JP (1) JP2004521412A (xx)
KR (1) KR20030072573A (xx)
CN (1) CN1230745C (xx)
CA (1) CA2432384A1 (xx)
FR (1) FR2818774B1 (xx)
HK (1) HK1063228A1 (xx)
IL (1) IL156482A0 (xx)
WO (1) WO2002052414A1 (xx)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004075582A1 (en) 2003-02-21 2004-09-02 Nortel Networks Limited Data communication apparatus and method for establishing a codec-bypass connection
WO2005089055A2 (en) * 2004-03-19 2005-09-29 Nortel Networks Limited Communicating processing capabilites along a communications path
GB0622408D0 (en) * 2006-11-10 2006-12-20 Ibm Device and method for detection and processing of stalled data request
US8346239B2 (en) 2006-12-28 2013-01-01 Genband Us Llc Methods, systems, and computer program products for silence insertion descriptor (SID) conversion
US8908541B2 (en) 2009-08-04 2014-12-09 Genband Us Llc Methods, systems, and computer readable media for intelligent optimization of digital signal processor (DSP) resource utilization in a media gateway
US9292409B2 (en) * 2013-06-03 2016-03-22 Infineon Technologies Ag Sensor interfaces
CN104360904A (zh) * 2014-10-16 2015-02-18 四川长虹电器股份有限公司 基于事件总线的模块间消息传递机制

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB8510973D0 (en) * 1985-04-30 1985-06-05 Emi Ltd Data transmission system
IL96808A (en) * 1990-04-18 1996-03-31 Rambus Inc Introductory / Origin Circuit Agreed Using High-Performance Brokerage
US5898845A (en) * 1996-10-29 1999-04-27 Intervoice Limited Partnership Assigning and utilizing overlapping address space for multiple cards on a common computer bus
US6157955A (en) * 1998-06-15 2000-12-05 Intel Corporation Packet processing system including a policy engine having a classification unit
US6185631B1 (en) * 1998-10-14 2001-02-06 International Business Machines Corporation Program for transferring execution of certain channel functions to a control unit and having means for combining certain commands and data packets in one sequence
US6690676B1 (en) * 1998-11-23 2004-02-10 Advanced Micro Devices, Inc. Non-addressed packet structure connecting dedicated end points on a multi-pipe computer interconnect bus
US6529504B1 (en) * 1999-06-02 2003-03-04 Sprint Communications Company, L.P. Telecommunications service control point interface
US6725281B1 (en) * 1999-06-11 2004-04-20 Microsoft Corporation Synchronization of controlled device state using state table and eventing in data-driven remote device control model

Also Published As

Publication number Publication date
WO2002052414A1 (fr) 2002-07-04
EP1344131A1 (fr) 2003-09-17
US20040059888A1 (en) 2004-03-25
FR2818774A1 (fr) 2002-06-28
CA2432384A1 (fr) 2002-07-04
HK1063228A1 (en) 2004-12-17
FR2818774B1 (fr) 2003-03-21
CN1230745C (zh) 2005-12-07
KR20030072573A (ko) 2003-09-15
JP2004521412A (ja) 2004-07-15
US6859847B2 (en) 2005-02-22
CN1486460A (zh) 2004-03-31

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