IL137596A - Method for use in simulation of an soi device - Google Patents

Method for use in simulation of an soi device

Info

Publication number
IL137596A
IL137596A IL13759600A IL13759600A IL137596A IL 137596 A IL137596 A IL 137596A IL 13759600 A IL13759600 A IL 13759600A IL 13759600 A IL13759600 A IL 13759600A IL 137596 A IL137596 A IL 137596A
Authority
IL
Israel
Prior art keywords
simulation
soi device
soi
Prior art date
Application number
IL13759600A
Other versions
IL137596A0 (en
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/388,594 external-priority patent/US6141632A/en
Application filed by Ibm filed Critical Ibm
Publication of IL137596A0 publication Critical patent/IL137596A0/en
Publication of IL137596A publication Critical patent/IL137596A/en

Links

IL13759600A 1999-09-02 2000-07-31 Method for use in simulation of an soi device IL137596A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/388,594 US6141632A (en) 1997-09-26 1999-09-02 Method for use in simulation of an SOI device

Publications (2)

Publication Number Publication Date
IL137596A0 IL137596A0 (en) 2001-07-24
IL137596A true IL137596A (en) 2003-11-23

Family

ID=23534750

Family Applications (1)

Application Number Title Priority Date Filing Date
IL13759600A IL137596A (en) 1999-09-02 2000-07-31 Method for use in simulation of an soi device

Country Status (3)

Country Link
JP (1) JP3418975B2 (en)
CN (1) CN1171168C (en)
IL (1) IL137596A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SG113006A1 (en) * 2004-01-04 2005-07-28 Teradyne Inc Silicon-on-insulator channel architecture of automatic test equipment
US8236709B2 (en) * 2009-07-29 2012-08-07 International Business Machines Corporation Method of fabricating a device using low temperature anneal processes, a device and design structure

Also Published As

Publication number Publication date
CN1171168C (en) 2004-10-13
IL137596A0 (en) 2001-07-24
JP3418975B2 (en) 2003-06-23
JP2001148427A (en) 2001-05-29
CN1287333A (en) 2001-03-14

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Legal Events

Date Code Title Description
FF Patent granted
KB Patent renewed
KB Patent renewed
MM9K Patent not in force due to non-payment of renewal fees