IL110202A - Equalization and error detection apparatus for high rate digital communications - Google Patents

Equalization and error detection apparatus for high rate digital communications

Info

Publication number
IL110202A
IL110202A IL110202A IL11020294A IL110202A IL 110202 A IL110202 A IL 110202A IL 110202 A IL110202 A IL 110202A IL 11020294 A IL11020294 A IL 11020294A IL 110202 A IL110202 A IL 110202A
Authority
IL
Israel
Prior art keywords
symbol
symbols
dfu
manner
output
Prior art date
Application number
IL110202A
Other versions
IL110202A0 (en
Inventor
Daniel Yellin
Ofer Amrani
Leon Bruckman
Original Assignee
Tadiran Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tadiran Ltd filed Critical Tadiran Ltd
Priority to IL110202A priority Critical patent/IL110202A/en
Publication of IL110202A0 publication Critical patent/IL110202A0/en
Priority to FR9507996A priority patent/FR2722046B1/en
Priority to GB9513612A priority patent/GB2291316B/en
Publication of IL110202A publication Critical patent/IL110202A/en

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0061Error detection codes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045Arrangements at the receiver end
    • H04L1/0047Decoding adapted to other signal detection operation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006Arrangements for removing intersymbol interference
    • H04L25/03012Arrangements for removing intersymbol interference operating in the time domain
    • H04L25/03019Arrangements for removing intersymbol interference operating in the time domain adaptive, i.e. capable of adjustment during data reception
    • H04L25/03057Arrangements for removing intersymbol interference operating in the time domain adaptive, i.e. capable of adjustment during data reception with a recursive structure

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
  • Error Detection And Correction (AREA)

Abstract

A combined receiver process, comprising: receiving a serial sequence of symbols, grouped as N-symbol codewords, constructed by encoding K symbols of source information; filtering the received sequence with a single feedforward filter (40) common to all DFU-s, in such a manner as to remove the part of intersymbol interference from the present estimate caused by symbols that were transmitted after the symbol presently being estimated; in each DFU (42, 43), filtering the symbols, previously decided upon, by the feedback filter in such a manner as to form a replica of that part of intersymbol interference caused by previously decided symbols; in each DFU, reducing the output of the feedback filter from the output of the feedforward filter to obtain an equalized estimate of the present symbol; in each DFU, computing the metric of the present estimate and deciding which is a reliable decision; opening an alternative branch (in controller/decoder) for unreliable decisions, which are the suspected DFE errors, in such a manner that there are B branches originating from the B most unreliable symbol decisions; decoding N-symbol paths, that correspond to codewords, in an order set by the controller in a manner that reflects the probability of the error events along the N-symbol path; selecting the first N-symbol path that belongs to the code as the ultimate output.
IL110202A 1994-07-04 1994-07-04 Equalization and error detection apparatus for high rate digital communications IL110202A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
IL110202A IL110202A (en) 1994-07-04 1994-07-04 Equalization and error detection apparatus for high rate digital communications
FR9507996A FR2722046B1 (en) 1994-07-04 1995-07-03 EQUALIZATION AND ERROR DETECTION DEVICE
GB9513612A GB2291316B (en) 1994-07-04 1995-07-04 Equalization and error detection apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IL110202A IL110202A (en) 1994-07-04 1994-07-04 Equalization and error detection apparatus for high rate digital communications

Publications (2)

Publication Number Publication Date
IL110202A0 IL110202A0 (en) 1994-10-21
IL110202A true IL110202A (en) 1997-07-13

Family

ID=11066302

Family Applications (1)

Application Number Title Priority Date Filing Date
IL110202A IL110202A (en) 1994-07-04 1994-07-04 Equalization and error detection apparatus for high rate digital communications

Country Status (3)

Country Link
FR (1) FR2722046B1 (en)
GB (1) GB2291316B (en)
IL (1) IL110202A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6314102B1 (en) 1997-07-10 2001-11-06 Alcatel Telecommunications system for providing both narrowband and broadband services to subscribers
US7079586B1 (en) 2000-03-16 2006-07-18 Koninklijke Philips Electronics N.V. Systems and methods for optimal distribution of symbols in a fixed size data packet to improve receiver performance
CN109873777B (en) * 2017-12-01 2021-12-17 华为技术有限公司 Error correction method and error correction device

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4833693A (en) * 1985-11-21 1989-05-23 Codex Corporation Coded modulation system using interleaving for decision-feedback equalization
NL8700125A (en) * 1987-01-20 1988-08-16 Philips Nv DEVICE FOR COMBATING INTERSYMBOL INTERFERENCE AND NOISE.
NL8701331A (en) * 1987-06-09 1989-01-02 Philips Nv DATA TRANSMISSION SYSTEM CONTAINING A DECISION FEED BACK EQUALIZER AND USING PARTIAL RESPONSE TECHNIQUES.
US4821288A (en) * 1987-12-21 1989-04-11 Cyclotomics, Inc. Parallel channel equalizer architecture
US5052000A (en) * 1989-06-09 1991-09-24 At&T Bell Laboratories Technique for improving the operation of decision feedback equalizers in communications systems utilizing error correction
JP2683665B2 (en) * 1991-11-27 1997-12-03 日本電気株式会社 Maximum likelihood sequence estimator
CA2083304C (en) * 1991-12-31 1999-01-26 Stephen R. Huszar Equalization and decoding for digital communication channel
CA2113919A1 (en) * 1992-06-18 1993-12-23 Norio Yamaguchi Maximum likelihood sequence estimator and maximum likelihood sequence estimation method

Also Published As

Publication number Publication date
GB2291316A (en) 1996-01-17
FR2722046B1 (en) 1997-12-12
GB9513612D0 (en) 1995-09-06
IL110202A0 (en) 1994-10-21
FR2722046A1 (en) 1996-01-05
GB2291316B (en) 1999-05-19

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Legal Events

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FF Patent granted
KB Patent renewed
HC Change of name of proprietor(s)
MM9K Patent not in force due to non-payment of renewal fees