IL106830A - Logic elements for interlaced carry/borrow systems having a uniform layout - Google Patents
Logic elements for interlaced carry/borrow systems having a uniform layoutInfo
- Publication number
- IL106830A IL106830A IL106830A IL10683093A IL106830A IL 106830 A IL106830 A IL 106830A IL 106830 A IL106830 A IL 106830A IL 10683093 A IL10683093 A IL 10683093A IL 106830 A IL106830 A IL 106830A
- Authority
- IL
- Israel
- Prior art keywords
- inverting
- input
- type logic
- gate
- output
- Prior art date
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- Semiconductor Integrated Circuits (AREA)
Abstract
An inverting-type logic element defined as a Binary Inverting Cell (BI-Cell) comprising: a pair of first and second output terminations Ao and Bo; at least first and second input termination pairs (Ai-Bi), each pair having first (Ai) and second (Bi) input terminations, and a first and second non-inverting type logic gate and a first and second inverting-type logic gate providing its output to an input of said first inverting-type logic gate, said first non-inverting type logic gate and said first inverting-type logic gate defined as a first combined gate and having its output (Z1) being connected to said Bo output termination, said second non-inverting type logic gate providing its output to an input of said second inverting-type logic gate, said second non-inverting type logic gate and said second inverting-type logic gate defined as a second combined gate and having its output (Z2) being connected to said Ao output termination, each of said first and second combined gates having inputs U1, V1 and W, said first input termination (A1) of said first input termination pair being connected to said input (W) at said non-inverting type gate of said first combined gate, defined as W1, said second input termination (B1) of said first input termination pair being connected to said input (W) at said non-inverting type gate of said second combined gate, defined as W2, said first input termination (A2) of said second input termination pair being connected in common to said inputs (U1) of said inverting-type logic gates of said first and second combined gates, said second input termination (B2) of said second input termination pair being connected in common to said inputs (V1) of said non-inverting type logic gates of said first and second combined gates, wherein said input termination pairs (Ai, Bi) are respectively provided with input signal pairs (Sai, Sbi), said input signal pairs having the IMPLY relationship: FSai r Sbi t 1, where Sbi L Sai; and wherein said first and second output terminations Ao and Bo provide, respectively, a binary output signal pair Sao and Sbo, and wherein said inverting-type logic element is characterized in that said first and second binary output signals Sao and Sbo are related by the logical IMPLY relation: FSao r Sbo t 1, where Sbo L Sao.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| IL106830A IL106830A (en) | 1993-08-29 | 1993-08-29 | Logic elements for interlaced carry/borrow systems having a uniform layout |
| US08/126,650 US5499203A (en) | 1992-09-27 | 1993-09-27 | Logic elements for interlaced carry/borrow systems having a uniform layout |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| IL106830A IL106830A (en) | 1993-08-29 | 1993-08-29 | Logic elements for interlaced carry/borrow systems having a uniform layout |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| IL106830A0 IL106830A0 (en) | 1993-12-08 |
| IL106830A true IL106830A (en) | 1997-03-18 |
Family
ID=11065209
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| IL106830A IL106830A (en) | 1992-09-27 | 1993-08-29 | Logic elements for interlaced carry/borrow systems having a uniform layout |
Country Status (1)
| Country | Link |
|---|---|
| IL (1) | IL106830A (en) |
-
1993
- 1993-08-29 IL IL106830A patent/IL106830A/en not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| IL106830A0 (en) | 1993-12-08 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FF | Patent granted | ||
| KB | Patent renewed | ||
| KB | Patent renewed | ||
| KB | Patent renewed | ||
| MM9K | Patent not in force due to non-payment of renewal fees |