IE911333A1 - Switching stage - Google Patents
Switching stageInfo
- Publication number
- IE911333A1 IE911333A1 IE133391A IE133391A IE911333A1 IE 911333 A1 IE911333 A1 IE 911333A1 IE 133391 A IE133391 A IE 133391A IE 133391 A IE133391 A IE 133391A IE 911333 A1 IE911333 A1 IE 911333A1
- Authority
- IE
- Ireland
- Prior art keywords
- voltage
- signal level
- switching stage
- switching
- cmos
- Prior art date
Links
- 230000005669 field effect Effects 0.000 claims description 10
- 238000005516 engineering process Methods 0.000 description 18
- 238000010586 diagram Methods 0.000 description 6
- 230000000295 complement effect Effects 0.000 description 4
- 238000011161 development Methods 0.000 description 2
- 230000018109 developmental process Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- XULSCZPZVQIMFM-IPZQJPLYSA-N odevixibat Chemical compound C12=CC(SC)=C(OCC(=O)N[C@@H](C(=O)N[C@@H](CC)C(O)=O)C=3C=CC(O)=CC=3)C=C2S(=O)(=O)NC(CCCC)(CCCC)CN1C1=CC=CC=C1 XULSCZPZVQIMFM-IPZQJPLYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
- H03K19/018507—Interface arrangements
- H03K19/018521—Interface arrangements of complementary type, e.g. CMOS
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0021—Modifications of threshold
- H03K19/0027—Modifications of threshold in field effect transistor circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/018—Coupling arrangements; Interface arrangements using bipolar transistors only
- H03K19/01806—Interface arrangements
- H03K19/01812—Interface arrangements with at least one differential stage
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19904012914 DE4012914A1 (de) | 1990-04-23 | 1990-04-23 | Cmos-schaltstufe |
Publications (1)
Publication Number | Publication Date |
---|---|
IE911333A1 true IE911333A1 (en) | 1991-10-23 |
Family
ID=6404912
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IE133391A IE911333A1 (en) | 1990-04-23 | 1991-04-22 | Switching stage |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP0453651A1 (enrdf_load_stackoverflow) |
JP (1) | JPH07122991A (enrdf_load_stackoverflow) |
DE (1) | DE4012914A1 (enrdf_load_stackoverflow) |
IE (1) | IE911333A1 (enrdf_load_stackoverflow) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE4324519C2 (de) * | 1992-11-12 | 1994-12-08 | Hewlett Packard Co | NCMOS - eine Hochleistungslogikschaltung |
DE4344246C2 (de) * | 1993-12-23 | 1998-01-29 | Siemens Ag | Störarme CMOS-Logikfamilie für gemischt analog-digitale Anwendungen |
GB2341246A (en) | 1998-09-03 | 2000-03-08 | Ericsson Telefon Ab L M | Differential level shifting circuit |
GB2547730B (en) * | 2016-02-26 | 2018-08-01 | Cirrus Logic Int Semiconductor Ltd | Clamping audio signal paths |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4471242A (en) * | 1981-12-21 | 1984-09-11 | Motorola, Inc. | TTL to CMOS Input buffer |
DE3300869A1 (de) * | 1982-01-26 | 1983-08-04 | Deutsche Itt Industries Gmbh, 7800 Freiburg | Logischer cmos-schaltkreis |
US4453095A (en) * | 1982-07-16 | 1984-06-05 | Motorola Inc. | ECL MOS Buffer circuits |
JPH0282713A (ja) * | 1988-09-19 | 1990-03-23 | Fujitsu Ltd | スイッチング補助回路 |
-
1990
- 1990-04-23 DE DE19904012914 patent/DE4012914A1/de active Granted
- 1990-12-18 EP EP90124635A patent/EP0453651A1/de not_active Withdrawn
-
1991
- 1991-04-19 JP JP3115442A patent/JPH07122991A/ja not_active Withdrawn
- 1991-04-22 IE IE133391A patent/IE911333A1/en unknown
Also Published As
Publication number | Publication date |
---|---|
DE4012914C2 (enrdf_load_stackoverflow) | 1992-09-24 |
EP0453651A1 (de) | 1991-10-30 |
JPH07122991A (ja) | 1995-05-12 |
DE4012914A1 (de) | 1991-10-24 |
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