IE72974B1 - Thermistor manufacture - Google Patents

Thermistor manufacture

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Publication number
IE72974B1
IE72974B1 IE940391A IE940391A IE72974B1 IE 72974 B1 IE72974 B1 IE 72974B1 IE 940391 A IE940391 A IE 940391A IE 940391 A IE940391 A IE 940391A IE 72974 B1 IE72974 B1 IE 72974B1
Authority
IE
Ireland
Prior art keywords
slurry
chips
wafers
wafer
chip
Prior art date
Application number
IE940391A
Other versions
IE940391A1 (en
Inventor
Thomas O'brien
John Power
Brian O'keeffe
Original Assignee
Betatherm Dev Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Betatherm Dev Ltd filed Critical Betatherm Dev Ltd
Priority to IE940391A priority Critical patent/IE72974B1/en
Publication of IE940391A1 publication Critical patent/IE940391A1/en
Publication of IE72974B1 publication Critical patent/IE72974B1/en

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  • Apparatuses And Processes For Manufacturing Resistors (AREA)

Abstract

An NTC thermistor is produced by calcining nickel and magnesium oxides and preparing a premix of transition metal oxides. The premix is milled to a size less than 5 microns. Organic solvents are added to form a slurry which is milled before finally adding a binder. The slurry is cooled to 12°C to 15°C after degassing and pured onto a sheet of glass at an ambient temperature of at least 25°C. After drying, the wafers thus formed are sintered and quenched. The wafers are cut and conductors are applied. The resistance of chips formed using the wafers may be altered by grinding away portion of the ceramic material.

Description

The invention relates to the manufacture of thermistors and in particular to a method for manufacturing negative temperature coefficient (NTC) thermistors. NTC thermistors are resistors with very large negative temperature coefficients which are typically -4 or -5% per degree centigrade.
According to the invention there is provided a method for manufacturing an NTC thermistor comprising the steps in Ϊ0 sequence ofs calcining transition metal oxides; mixing the metal oxides to form a premix; milling the premix to reduce the particle size to less than 8 microns? adding a solvent mixture to the milled mix to form a slurry? further milling the slurry; adding a binding agent to the milled slurry; further milling the slurry; degassing the slurry to remove entrapped air; cooling the slurry to a temperature of less than 15°C; - 2 pouring the cooled slurry onto a support in an atmosphere at a temperature of at least 2S°C? spreading the slurry on the support to a predetermined desired thickness; drying the slurry to form a dried ceramic wafer on the support; burning off the binder from the ceramic wafers at a temperature of from 150 to 350°C; sintering the ceramic wafers at a temperature of greater than 1000°C; applying a conductor composition to the wafers ? and cutting the wafers into chips of desired size to achieve required electrical characteristics .
In one embodiment to the invention the cooled slurry is poured onto a support in an atmosphere which is at a temperature of from 25 to 28°C.
In a preferred arrangement after debinderisation and before sintering the temperature of the wafers is raised to at least 600°C.
In one embodiment to the invention after sintering a portion of the wafer is removed and tested and the sintering conditions are, if necessary, adjusted.
In a particularly preferred embodiment to the invention the wafer with the conductor applied is mounted on a cutting support, a plurality of first parallel cuts are made across the wafer, a second cut is made across the wafer perpendicular to the first parallel cuts to form a row of chips, selecting a chip from the row, testing the electrical characteristics of the chip and adjusting the position of further second cuts to achieve desired electrical properties .
In one case the conductor material is a platinum-gold conductor which is screen printed onto the ceramic wafer. In this case a top support is applied over the wafer prior to cutting. Preferably the top support layer comprises a glass film which is subsequently removed from the chips by boiling.
In a preferred arrangement a plurality of chips are placed on a bed, and, by means of a microscope and associated visual display screen, leads are attached to each chip, the chips with leads applied are dried, the chips are dipped in glass and the glass is fired to encapsulate the chip.
In one case the glass coated chip is mounted in a tube.
In another embodiment to the invention the electrical properties of the thermistor are tested and portion of the chip is removed to achieve desired electrical characteristics .
In a preferred arrangement a portion of the chip is removed by grinding.
The invention will be more clearly understood from the following description thereof given by way of example only.
Thermistors comprise a thin wafer of ceramic material having conductors on either side. In the process of the invention the ceramic material is formed from a mixture of transition metal oxides, typically manganese oxide and nickel oxide in weight proportions of approximately 2 s 1.
At least the manganese and nickel oxides are first calcined in open containers at temperatures of at least 800°C to burn off any impurities. In addition the calcining process contributes to reducing the particle size.
A desired premix of transition metal oxides are then milled, for example by ball milling until the particle size is reduced to less than 5 microns. A mixture of organic solvents are then added to the dry mill to form a slurry which is further milled. After a period of slurry milling which is typically about 24 hours a binder material is added to the slurry to increase its viscosity. The slurry is further milled for a further period typically of 24 hours. The milled slurry is removed from the mill and then degassed in a vacuum chamber to remove entrapped air while it is still warm.
We have found that if is important to cool the slurry down to about 12°C - 15°C immediately after degassing to avoid solvent evaporation and prevent cracking of the final wafers produced. We have also found through extensive research and development that the slurry should be poured onto a support such as a sheet of glass in an atmosphere having a temperature of at least 25°C and preferably between 25°C and 27°C- After pouring, the slurry is spread over the glass sheet to a desired thickness which is typically from 27 thousands of an inch to 45 thousands of an inch.
The slurry is allowed to dry at a temperature of 25°C to 27°C for at least 2 hours with a further drying period overnight at ambient temperatures.
The wafers thus formed are then peeled off the support glass and cut into pieces which are typically 6 cm x 6 cm and then placed on saggers with the side of the wafer which is facing the glass support during pouring lowermost. A plurality of saggers are stacked one upon the other,, typically with the saggers containing the wafers between upper and lower saggers which do not necessarily contain wafer material.
The saggers are then introduced into a furnace to burn off the binder by a debinderisation process at a temperature which is stepped up from 150°C to 350°C over a period of up to 12 hours.
We have found that to avoid thermal shock and possible micro-cracking of the wafers , it is important to raise the temperature of the wafers to less than 900°C prior to transfer to a sintering oven in which the wafers are heated at a temperature of from 1000 to 1300°C which is stepped up over a period of typically 12 hours.
The wafers are placed on different saggers, depending on the level of the saggers in the debinderisation and sintering ovens required to achieve desired electrical characteristics. It is also important to remove the saggers from the sintering ovens as soon as possible after the sintering process is complete so that quenching commences as quickly as possible.
After sintering and quenching a sample is cut from a ceramic wafer, conductor material is applied and its electrical properties are tested. If necessary the sintering conditions for further batches of ceramic material are adjusted in accordance with the electrical characteristics recorded. Further, the test results from the wafers allow the wafers to be categorised early in the process as those which will achieve a required tolerance level.
In the case of silver-based conductors, the ceramic sheets are dipped in a silver conductor and dried. The dried wafer is then fired in a furnace at a temperature of at least 700°C.
The wafers with the conductor applied are then mounted on a support and a plurality of parallel lines are cut across the wafer a desired distance apart. The wafer is then rotated through substantially 90°C and two lines perpendicular to the first set of lines are inscribed across the wafer forming one row of chips. One of the chips thus formed is removed from the wafer and its electrical characteristics are tested. Depending on the electrical characteristics, the distance between the second cut lines is adjusted to achieve a desired chip size and hence desired electrical properties.
In the case of silver-based conductors the wafers are supported during cutting on a tensioned film of plastics material so that after cutting the chips can be readily peeled off the film without the requirement for further processing. In the case of platinum-gold conductor materials the conductor material is screen printed onto the ceramic wafers and an additional top layer is applied over the chips before cutting. This is to provide added support as such chips are usually cut to a very small size. The top layer is preferably a thin glass film which may be readily removed from the chips by boiling.
In the case of platinum-gold conductor chips a plurality of the small chips which typically have major dimensions of 40 thou are placed on a support bed. Using a microscope and associated visual display monitor the individual chips are separated and a platinum lead is applied to one side of the chip. The chips with the platinum lead applied to one side are then mounted in rows on a double sided tape. At a further station the tape is laid on a bed and again using a microscope and associated visual display screen the tape is removed and a platinum lead is applied to the other side of the chip. After the leads are attached the chips are dried at a temperature of about 150°C and then fired in a furnace at a temperature of at least 800°C.
The chips are then dipped in a glass to encapsulate the chips and ends of the conductor leads and the glass is fired to approximately 600°C so that the glass melts and coats the component. Typically the glass coated thermistors are then mounted in a tube for use, for example for surgical and other medical techniques.
To achieve desired electrical properties, the electrical properties of each thermistor produced are checked and if necessary the resistance of the chips is altered for example by grinding part of the ceramic material, retesting the material and if necessary further grinding to achieve desired electrical properties. In this wav very close tolerances on electrical characteristics may be achieved. - 8 The invention provides an integrated highly efficient process for producing a wide range of different NTC thermistors.
The invention is not limited the embodiments hereinbefore 5 described which may be varied in detail.

Claims (5)

1. A method for manufacturing an NTC thermistor comprising the steps in sequence ofs calcining transition metal oxides £ mixing the metal oxides to form a premix; milling the premix to reduce the particle size to less than 8 microns; adding a solvent mixture to the milled mix to form a slurry; further milling the slurry; adding a binding agent to the milled slurry; further milling the slurry; degassing the slurry to remove entrapped air; cooling the slurry to a temperature of less than 15°C? pouring the cooled slurry onto a support in an atmosphere at a temperature of at least 25°C; spreading the slurry on the support to a predetermined desired thickness; drying the slurry to form a dried ceramic wafer on the support; burning off the hinder from the ceramic wafers at a temperature of from 150 to 350°C; sintering the ceramic wafers at a temperature of greater than 1OOO°C; applying a conductor composition to the wafers $ and cutting the wafers into chips of desired size to achieve required electrical characteristics.
2. A method as claimed in claim 1 wherein the cooled slurry is poured onto a support in an atmosphere which is at a temperature of from 25°C to 28°C.
3. A method as claimed in claim 1 or 2 wherein, after debinderisation and before sintering the temperature of the wafers is raised to at least S00°C.
4. A method as claimed in any preceding claim wherein after sintering a portion of the wafer is removed and tested and the sintering conditions are, if necessary, adjusted. 5 . A method as claimed in any preceding claim wherein the wafer with the conductor applied is mounted on a cutting support, a plurality of first parallel cuts are made across the wafer, a second cut is made across the wafer perpendicular to the first parallel cuts to form a row of chips, selecting a chip from the row, testing the electrical characteristics of the chip and adjusting the position of further second cuts to achieve desired electrical properties . 6. A method as claimed in any preceding claim wherein the conductor material is a platinum-gold conductor which is screen printed onto the ceramic wafer. 7. A method as claimed in claim 5 wherein a top support layer is applied over the wafer prior to cutting. 8. A method as claimed in claim 7 wherein the top support layer comprises a glass film which is subsequently removed from the chips by boiling. 9. A method as claimed in any of claims 6 to 8 wherein a plurality of chips are placed on a bed, and, by means of a microscope and associated visual display screen, leads are attached to each chip, the chips with leads applied are dried, the chips are dipped in glass and the glass is fired to encapsulate the chip. 10. A method as claimed in claim 9 wherein the glass coated chip is mounted in a tube. 11. A method as claimed in any preceding claim wherein the electrical characteristics of the thermistor are tested and portion of the chip is removed to achieve desired electrical characteristics. 12. A method as claim in claim 11 wherein the portion of the chip is removed by grinding. 13. 14.
5. 15. A method for manufacturing thermistors substantially as hereinbefore described. A thermistor whenever produced by a method as claimed in any preceding claim. A glass coated thermistor whenever produced by a method as claimed in any of claims 6 to 10 or 13.
IE940391A 1994-05-12 1994-05-12 Thermistor manufacture IE72974B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
IE940391A IE72974B1 (en) 1994-05-12 1994-05-12 Thermistor manufacture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IE940391A IE72974B1 (en) 1994-05-12 1994-05-12 Thermistor manufacture

Publications (2)

Publication Number Publication Date
IE940391A1 IE940391A1 (en) 1995-11-15
IE72974B1 true IE72974B1 (en) 1997-05-07

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
IE940391A IE72974B1 (en) 1994-05-12 1994-05-12 Thermistor manufacture

Country Status (1)

Country Link
IE (1) IE72974B1 (en)

Also Published As

Publication number Publication date
IE940391A1 (en) 1995-11-15

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