IE44200B1 - Passivated and encapsulated semiconductors and method of making same - Google Patents

Passivated and encapsulated semiconductors and method of making same

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Publication number
IE44200B1
IE44200B1 IE1789/76A IE178976A IE44200B1 IE 44200 B1 IE44200 B1 IE 44200B1 IE 1789/76 A IE1789/76 A IE 1789/76A IE 178976 A IE178976 A IE 178976A IE 44200 B1 IE44200 B1 IE 44200B1
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Ireland
Prior art keywords
semiconductor
contact members
glass
members
semiconductor device
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IE1789/76A
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IE44200L (en
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Gen Instrument Corp
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Application filed by Gen Instrument Corp filed Critical Gen Instrument Corp
Publication of IE44200L publication Critical patent/IE44200L/en
Publication of IE44200B1 publication Critical patent/IE44200B1/en

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    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
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    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/291Oxides or nitrides or carbides, e.g. ceramics, glass
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    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
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    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3135Double encapsulation or coating and encapsulation
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    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
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    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/10251Elemental semiconductors, i.e. Group IV
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    • H01L2924/11Device type
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    • H01L2924/1204Optical Diode
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    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13062Junction field-effect transistor [JFET]

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  • Ceramic Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

1510294 Semiconductor devices GENERAL INSTRUMENT CORP 13 Aug 1976 [14 Aug 1975] 33887/76 Heading H1K In an encapsulated semiconductor assembly, a homogeneous insulating glass layer, having a thermal expansion coefficient similar to that of the semiconductor and to that of the contact members connected between the semiconductor and its leads, and which covers the exposed semiconductor surface and partially covers the contact member surfaces, is covered with an insulating plastics layer which covers the exposed surfaces of the contact members and the connections between the leads and contact members. In the embodiment shown, the contact members 16, 16<1>, formed preferably from Mo, W, Ta, and alloys thereof, connect leads 20, 20<1> to a rectifier 12 through brazing alloy contacts 18, 18<1> and Al layers 14, 14<1>. The glass layer 30, formed by fusing glass particles left after evaporation of the vehicle from an applied slurry, may be an alkali-free zinc borosilicate or lead borosilicate glass. The plastics layer 40 may be an epoxy or silicone type material. The encapsulation process can be applied to devices having a plurality of leads, such as transistors and stacks of chips.

Description

The present invention relates to a passivated and encapsulated semiconductor and methods of making same.
It has long been known that semiconductor devices are more reliable and longer lived if their active surfaces are coated with a passivating and protecting coating. Many different substances have been proposed for use in such a coating, among them various types of alkali-free glasses, including an improved alkali-free zinc-borosilicate glass described in Morrissey U. S. 3,752,701 (issued August 14, 1973 and assigned to General Instrument Corporation). While such · a glass passivation/encapsulation layer provides passivation to the semiconductor junction, mechanical handling strength, and hermeticity, it typically suffers from one or more of the following disadvantages: (1) lacking reproducibility in external size due to the nature of the material and the techniques available for applying the same, (2) being oval shaped and thus hard to handle in customers' circuit boards and customer equipment, (3) being light transparent, and (4) being difficult to mark.
In addition to glass, the prior art suggests as passivation/encapsulation materials various plastics or resins. In such a device a varnish or silastic type material is employed to achieve passivation ahout the semiconductor junction, the junction passivating material then being overmolded or encapsulated with an epoxy or silicone type 25 liquid or powder molding material. However, some of the plasticpassivation/encapsulation layers of the prior art typically suffer from one or more of the following disadvantages: (1) the varnish or Silastic junction passivation material does not completely protect the semiconductor against moisture, (2) both the junction passivation and encapsulating plastic materials deteriorate at high temperature operation, (3) the encapsulative plastic material provides poor permeability protection relative to glass, so that the plastic passivated/ encapsulated devices show failures under pressure cooker type tests at 15 p.s.i, and (4) the encapsulating plastic material frequently does not provide fire-retardant properties (although this feature may be incorporated into the plastic mold material).
The plastic passivated/encapsulated semiconductors antedate the glass passivated/encapsulated semiconductors and, despite their above-recited disadvantages, have been produced and used in such vast quantities that organizations of manufacturers and users have established dimensional standards therefor, thus making possible the development of automatic handling machinery for testing, marking, tape-reel packaging, lead bending and trimming, and automatic insertion of the devices into printed circuit boards. While all of the above-identified reliability problems characteristic of the plastic passivated/encapsulated devices are overcome in the glass passivated/encapsulated devices, the size and beadlike shape of the glass layer varies considerably from device to device. This variability, especially in conjunction with the miniature size of the beads in the newest devices, greatly increases the problems associated with automatic handling equipment, often to the point where cost-saving automatic techniques cannot be used and manual assembly costs must be absorbed to achieve the advantages of superior reliability.
Thus, despite the reliability problems manifested by the older plastic passivated/encapsulated semiconductors, they remain most popular because of their mechanical design which is so readily adaptable to automation.
While semiconductor assemblies passivated and encapsulated in a combination of plastic and glass have been described in the prior art, not all such assemblies have proved to be entirely satisfactory. Such semiconductor assemblies (as described in U.S. Patent Specification Nos. 3,199,395 and 3,237,272) typically possess one or more of the following disadvantages: (1) they are not applicable to axial lead semiconductors, (2) they utilize a special low melting point glass which fails to afford the aforementioned advantages of glass passivation/encapsulation, and (3) they utilize a microscopic passivation layer of grown lead silicate glass which affords passivation only at low voltage levels.
Accordingly, it is an object of the present invention to provide a passivated/encapsulated semiconductor assembly which combines the advantages of glass passivation and plastic, encapsulation.
Xn accordance with this invention therefore we provide an encapsulated and passivated semiconductor comprising: (A) a semiconductor assembly including (i) a single semiconductor device, (ii) a plurality of conductive lead members, (iii) a plurality of elongate conductive metal contact members, (iv) a plurality of first connecting means, each of said first connecting means securing said semiconductor device to one end of a respective one of said contact members, and (v) a plurality of second connecting means, each of said second connecting means securing the other end of said respective contact member to one end of a - 4 _ 4420q respective one of said lead members; and (B) a homogeneous passivating layer of fused particles of non-conductive glass having a thermal coefficient of expansion similar to those of said contact members and said semiconductor device, said passivating layer encapsulating any exposed surfaces of said semiconductor device, said first connecting means, and at least a respective portion of each of said contact membarsaxtending from said one end thereof; and a layer of non-conductive plastic encapsulating any exposed surfaces of said passivating layer, said contact members, said second connecting means, and said secured ends of said lead members, leaving tha remainder of said lead members exposed.
There is also provided a process for passivating and encapsulating a semiconductor assembly having a single semi-conductor device, conductive lead members, and elongate conductive metal contact members connecting said semiconductor device to respective ends of said lead members characterized by tha steps of (A) applying over any exposed surfaces of said semiconductor device and over at least a length of said contact members, a slurry of finely divided particles of a nonconductive glass having a thermal coefficient of expansion similar to those of said contact members and said semiconductor device; (B) heating said glass particles to a temperature effective to fuse said glass particles and form a homogeneous passivating layer therefrom; and (C) molding non-conductive plastic encapsulating material about any exposed surfaces of said passivating layer, said contact members, and the ends of said lead members connected to said contact members.
Preferably, the semiconductor assembly is of tha axial lead variety,with tha tails or unsecured ends of the lead maiibers extending 44S00 outwardly from the plastic encapsulating layer.
In a preferred embodiment the passivating layer is homogeneous in composition and has a bead-like peripheral configuration, with a radial thickness in the plane of the semiconductor device of at least 0.13 mm, and preferably 0,130.25 mm. The encapsulating layer, on the other hand, has a substantiallycylindrical configuration well suited for automatic handling by processing equipment presently available.
The contact members are preferably refractory metal; the glass is preferably an alkali-free zinc borosilicate glass; and the plastic encapsulating material is preferably an epoxy or silicone plastic.
In order to passivate the semiconductor assembly, there is applied, over any exposed surfaces of the semiconductor device and at least a length of the contact members, a slurry of finely divided particles of an electrically noneonductive preferably alkali-free glass having a thermal coefficient of expansion similar -to those of the contact members and the semiconductor device. The glass particles are then heated to a temperature effective to fuse them and form a homogeneous passivating layer therefrom. To encapsulate the passivated semiconductor assembly, a non-conductive plastic material i.g molded about any exposed surfaces of the passivating layer , the contact Members, and the lead member heads secured thereto.
In a preferred process, the slurry has a slurry vehicle of de-ionized water or a non-ionic organic compound. After application, the slurry is pre-heated to remove the slurry vehicle. Then the remaining glass is heated at a temperature in the range of 680-750’C for about 4-20 minutes to - 6 44200 effect fusing thereof and formation of the resultant homogeneous passivating layer.
The passivated and encapsulated semiconductors in accordance with the present invention combine the reliability features of glass passivation with the peripheral or external configuration features of plastic encapsulation which enable the use therewith of automatic handling equipment.
Fig. 1 is a side elevation view of a semiconductor assembly prior to passivation and encapsulation; Fig. 2 is a side elevation view, partially in crosssection, of the semiconductor assembly of Fig. 1 after application thereto of a passivating layer of glass; and Fig. 3 is a side elevation view, partially in crosssection, of the semiconductor assembly of Fig. 2 after application thereto of an encapsulating layer of plastic.
Referring now to the drawing and in particular to Fig. 1 thereof, therein illustrated is a semiconductor assembly of the type described in British Patent Specification No. 1,465,010, and generally designated by the numeral 10. The assembly 10 is preferably an axial lead semiconductor assembly; however, the principles of the present invention are also applicable to other types of semiconductor assemblies. The assembly 10 includes a semiconductor device 12 formed substantially of silicon, although one or more portions thereof may have minute quantities of various conventional donants such as phosphorous, boron and the like, as will be recognized by those skilled in the semiconductor art. For clarity in illustrating the principles of the present invention, the semiconductor device 12 has been illustrated as a rectifier adapted for connection to only two axial lead members, although the principles of the present invention aPPlY equally well to Semiconductors as a group, e.g., transistors, whether the N-type, P-type or combination types and whether junction, field effect or other types of semiconductors.
Disposed on each end of the semiconductor device 12 is a thin layer 14, 14' of a conductive joining material which readily wets silicon. While aluminium is preferred for this purpose, other materials may also be used, for example, silver solder, aluminum silicon alloys. The layer 14, 14' may be applied to the semiconductor device 12 by conventional techniques well-known in the semiconductor art, the preferred technique being evaporation deposition.
Extending outwardly from each layer 14, 14' is a contact member 16, 16' generally referred to as a slug Each contact member 16, 16' is formed of an electrically conductive metal, preferably a thermally conductive refractory metal such as molybdenum, tungsten, tantalum and alloys thereof. Whether the alloys are composed of two or - 8 4 4 2 0 0 more of the aforementioned refractory metals, or of one or more of the refractory metals with other materials, the alloys must, of course, be selected according to their known thermal coefficients of expansion to insure that the thermal coefficients of expansion of the semiconductor device 12, the contact members 16,16' and any materials used to passivate the semiconductor device 12 are compatible.
Extending outwardly from each contact member 16, 16 is a brazing alloy preform 18, 18' of relatively planar configuration. The brazing alloy may comprise on a weight basis about 80-89% copper, about 5-15% silver, and about 4-6% phosphorus, and is preferably a commercially available 80/15/5 silver solder or high temperature brazing alloy of the type marketed by Englehard Industries Division of Englehard Minerals and Chemicals Corp. (Murray Hill, New Jersey) under the trademark SILVAL0Y15 and by HANDY & HASMON, INC. under the trademark SILFOS. The brazing alloy is preferably characterized by a freezing point of about 640°C and a wetting point of about 705°C, and requires neither an oxidizing nor reducing environment during the brazing process.
A nail-head axial lead member generally designated by the numeral 20,20' has a head 22, 22' at one end thereof connected to the contact member 16, 16' by the means 18, 18' and a tail 24, 24' available for connection to other circuit members at the other end thereof. Each lead member 20, 20' is formed of a thermally and electrically conductive metal such as copper, silver or alloys thereof, the alloys of such metals by themselves or individually with other materials, being selected for their ability to braze well with the brazing alloy of the means IS, 13'.
While it is-preferred that the conductive metal be formed substantially of the aforementioned copper, silver or alloys thereof, a core or sleeve is frequently used in connection with the lead member to facilitate its functioning as a heatsink for the semiconductor device 12, to reduce the cost of materials used in the lead member, and/or to provide electrical insulation for the lead member.
The means 14, 14' used to connect the semiconductor 10 12 with the contact members 16, 16' and the means 18, 18' used to connect the contact members 16, 16' with the lead member heads 22,22' are not a critical feature of the present invention and other connecting means recognized by those skilled in the semiconductor art may be used in their place.
Nonetheless, the aluminum connecting means 14, 14' is preferred as the aluminum and silicon form a 'hard contact' eutectic having a melting point of about 575°C which joins extremely well with both the semiconductor device 12 and the refractory metal of contact members 16, 16'. Similarly, the copper/silver/phosphorus connecting means 18, 18' is preferred as it too forms a particularly strong high temperature joint. The resultant sub-assembly is a unitary structure having brazed joints which withstand higher temperatures than soft soldered joints, are stronger and less porous than .butt welded joints, and withstand high temperature and high humidity conditions (such as 85°C and 85% relative humidity) without failure or the development of high electrical thermal resistances. The solidity and strength of the brazed joints thus formed also permit the assembly 10 to be further processed without resultant damage thereto.
Referring now cc Fig. 2, the exposed surface of the semiconductor device l?. after etcning (for example, with a solution of nitric and hydrofluoric acids) to remove contaminants, is passivated to prevent re-contamination. The passivating layer 30 extends over the exposed surfaces of the semiconductor device 12, the aluminum layers 14, 14' and at least a length of the contact members 16, 16*. It is preferred that the passivating layer 30 not contact the brazing alloy 18, 18', and the easiest method of insuring this non-contact is to terminate the passivating layer 30 short of the far ends of the contact members 16, 16'.
The passivating layer 30 is homogeneous in nature and comprises fused particles of a non-conductive high melting point glass-having a thermal coefficient of expansion similar to that of the contact members 16, 16' and the semiconductor device 12. The passivating layer 30 has a bead-like peripheral configuration with a radial thickness in the plane of the semiconductor device 12 of at least 0.13 millimeters, and preferably 0.13-0.25 millimeters, to insure passivation even at high voltage levels.
A preferred glass for use in the passivating layer 30 is the alkali-free zinc-borosilicate glass described in Morrissey U. S. Patent No. 3,752,701 (issued August 14, 1973) and containing, on a weight basis, 55-857. ZnO, 22-277. B2O3, 6-137, SiO2, 2-47. PbO, and 2-47. Al203 and optionally 0,5-2.0% Sb2O3· Another preferred glass is an alkali-free lead-borosilicate glass containing 45-517. PbO, 36-44% SiO2j 8-13% B2O3, 2-5% AI2O3 available from Innotech Corporation (Norwalk, Connecticut) under the INNOTECH 740 series of tradenames. However, other non-conductive non-contaminating glasses having athermal coefficient of expansion com30 patible with that of the contact members 16, 16' and the semiconductor device 12 may be employed. A typical silicon semiconductor has a thermal coefficient of expansion of approximately - 11 442«° 2.3-2.5 X IO'0 cm/cm-’C; typical molybdenum contact members have a thermal coefficient of expansion of approximately 4.5-5.0 X 106 cm/cm-°C; and the zinc-borosilicate glass passivating layer has a thermal coefficient of expansion of approximately 4.2-4,4 X 10-^ cm/cm-°C within a temperature range of 0°-300°C.
The degree of similarity between the thermal coefficients of expansion of the glass, the semiconductor and the contact members (i.e., the closeness of the match) must he such as to minimize or prevent breaking of the glass passivating layer 30 or withdrawal of the contact members 16, 16’ or semiconductor device 12 from the passivating layer 30 within the contemplated range of temperatures to which the assembly will be exposed. Generally thermal coefficients of expansion of the same order of magnitude will be satisfactory. (It is to be noted that in general the thermal coefficient of expansion characteristics of the joining layer 14, 14' may be ignored as a practical matter due to the extreme thinness of the layer.) The material of plastic encapsulating layer 40 is preferably an epoxy or silicone type plastic. It may be made opaque, easily markable and flame resistant, or not, as desired for particular applications. It is to be noted that in general the thermal coefficient' of expansion characteristics of the plastic 25 layer 40 may be ignored as a practical matter due to the relatively low hardness or give of the plastic. The plastic encapsulating layer 40 preferably has a substantially cylindrical configuration which adapts it for handling by the automatic machinery presently existing for the handling of plastic passivated and encapsulated semiconductors so that both the reliability advantages of glass passivation - 12 4 4 2 0 0 resulting from Layer 30 and the economic advantages of plastic encapsulation resulting from layer 40 are obtained.
Given the semiconductor assembly 10 (as illustrated in Fig. 1), the passivated and encapsulated semiconductor assembly is formed by applying a slurry of finely divided particles of glass so as to cover the exposed surfaces of the semiconductor device 12, the aluminum layer 14 and at least a length of each of the contact members 16, 16'. This is conveniently accomplished by controlled dripping of the slurry onto the semiconductor devicec£ an axially rotating assembly 10, the rotation and the surface tension of the slurry causing a bead-like configuration to be assumed. The slurry ( vehicle is typically deionized water or a non-ionic organic eompound and may be evaporated after application by heating (for example, in a hot air drier at a temperature of about j 100-400’C for about 5-30 minutes), thus leaving the glass particles alone on the desired surfaces of the semiconductor assembly 10. The glass particles are then heated to a temperature sufficient to fuse the glass particles and form ! therefrom a homogeneous passivating layer of bead-like peripheral configuration. Generally, heating at a temperature in the range of 680-750°C for about 4 to 20 minutes is sufficient to accomplish the fusing of the glass particles into the homogeneous passivating layer 30, although the temperature and 25 heating duration factors will, of course, vary with the type of glass used. After the passivating layer 30 has had an opportunity to cool, a non-conductive plastic encapsulating material is molded about any exposed surfaces of the passivatine laver 30, the contact members 16, 16' and the lead member heads 22, 22' by conventional techniques such as 4420° casting, injection molding, etc. The dimensions and configurations of the plastic encapsulating layer 40 thus formed may be selected for ease of handling with existing equipment and are easily reproducible from one assembly to another.
Such passivated and encapsulated semiconductor assemblies have all the reliability characteristics of a glass passivated semiconductor: (1) long life under operating conditions (both reverse bias and AC operation);(2) long life under elevated temperatures and DC blocking (high voltage) conditions; (3) an absence of hermeticity failures (as evidenced by humidity cycling and pressure boinb tests); (4) an absence of intermittent forward failures due to soldering conditions or thermal cycling, and (5) high physical strength (as evidenced by passage of lead pttll or bend tests with failures limited only by the strength Of the lead wire itself). Furthermore, the passivated and encapsulated semiconductor assembly has a configuration similar to that of conventional plastic axial lead assemblies and can be automatically tested, branded, tape packaged, formed, and inserted on standard equipment for handling plastic axial lead semiconductor assemblies. These advantages result from the high temperature (above 600°C) brazed construction of the joints of the semiconductor assembly, the hermetic high temperature glass seal provided by use of a heavy macroscopic glass passivation layer over the silicon chip, and the uniform and reproducible peripheral configuration of the molded plastic encapsulation which meets standardized plastic packaging requirements.

Claims (20)

1. CIAIMS:1. An encapsulated and passivated semiconductor comprising: (A) a semiconductor assembly including (i) a single semiconductor device, (ii) a plurality of conductive lead members, (iii) a plurality of elongate conductive metal contact members, (iv) a plurality of first connecting means, each of said first connecting means securing said semiconductor device to one end of a respective one of said contact members, and (v) a plurality of second connecting means, each of said second connecting means securing the other end of said respective contact member to one end of a respective one of said lead members; and (B) a homogeneous passivating layer of fused particles of non-conductive glass having a thermal coefficient of expansion similar to those of said contact members and said semiconductor device, said passivating layer encapsulating any exposed surfaces of said semiconductor device, said first connecting means, and at least a respective portion of each of said contact membejs extending from said one end thereof; and a layer of non-conductive plastic encapsulating any exposed surfaces of said passivating layer, said contact members, said second connecting means, and said secured ends of said lead members, leaving the remainder of said lead members exposed.
2. A semiconductor as claimed in Claim 1 wherein said semiconductor assembly comprises an axial lead semiconductor.
3. A semiconductor as claimed in Claim 1 or Claim 2 wherein the other ends of said lead members extend outwardly from said plastic layer.
4. A semiconductor as claimed in any one of Claims 1 to 3 - 15 44200 wherein said contact members are refractory metal contact members.
5. A semiconductor as claimed in any one of Claims 1 to 4 wherein said glass is alkali-free zinc borosilicate glass.
6. A semiconductor as claimed in any one of Claims 1 to 5 wherein said passivating layer has a bead-like peripheral configuration.
7. A semiconductor as claimed in Claim 6 wherein said bead-like peripheral configuration has a radial thickness in the plane of said semiconductor device of 0.13-0.25 mm.
8. A semiconductor as claimed in any one of Claims 1 to 7 wherein said plastic encapsulating material is selected from the group consisting of epoxy and silicone plastics.
9. A semiconductor as claimed in any one of Claims 1 to 8 wherein said plastic layer has a substantially cylindrical configuration.
10. A process for passivating and encapsulating a semiconductor assembly having a single semiconductor device, conductive lead members, and elongate conductive metal contact members connecting said semiconductor device to respective ends of said lead members characterized by the steps of (A) applying over any exposed surfaces of said semiconductor device and over at least a length of said contact members, a slurry of finely divided particles of a nonconduotive glass having a thermal coefficient of expansion similar to those of said contact members and said semiconductor device; (B) heating said glass particles to a temperature effective to fuse said glass particles ahd form a homogeneous - 16 44200 passivating layer therefrom; and (C) molding non-conductive plastic encapsulating material about any exposed surfaces of said passivating layer, said contact members, and the ends of said lead members connected to said contact members.
11. A process as claimed in Claim 10 wherein said slurry is pre-heated to remove the slurry vehicle intermediate steps (B) and (C).
12. A process as claimed in Claim 10 or Claim 11 wherein said slurry has a slurry vehicle of de-ionized water or a non-ionic organic compound.
13. A process as claimed in any one of Claims 10 to 12 wherein said glass is heated at a temperature of about 680 to 75O°C for about 4 to 20 minutes to effect fusing.
14. A process as claimed in any one of Claims 10 to 13, wherein said plastic encapsulating material is a member of the group of epoxy and silicone plasties.
15. A process as claimed in any one of Claims 10 to 14 wherein said contact members are formed of refractory metal.
16. A process as claimed in any one of Claims 10 to 15, wherein said semiconductor assembly is an axial lead semiconductor assembly.
17. A process as claimed in any one of Claims 10 to 16, wherein said glass is alkali-free zinc borosilicate glass.
18. A semiconductor produced according to a process as claimed in any one of claims 10 to 17. 17
19. A semiconductor substantially as described herein with reference to the accompanying drawings.
20. A process for passivating and encapsulating a semiconductor assembly,substantially as described herein 5 with reference to the accompanying drawings.
IE1789/76A 1975-08-14 1976-08-13 Passivated and encapsulated semiconductors and method of making same IE44200B1 (en)

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GB1510294A (en) 1978-05-10
SE7608988L (en) 1977-02-15
DE2636580A1 (en) 1977-02-17
AU1678376A (en) 1978-02-16
IT1062666B (en) 1984-10-20
BR7605354A (en) 1977-08-16
IE44200L (en) 1977-02-14
FR2321192B1 (en) 1979-03-02
JPS5237772A (en) 1977-03-23
FR2321192A1 (en) 1977-03-11
ES450690A1 (en) 1977-12-01
CA1057420A (en) 1979-06-26
NL7609034A (en) 1977-02-16

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