HK37380A - Binary multipliers - Google Patents

Binary multipliers

Info

Publication number
HK37380A
HK37380A HK373/80A HK37380A HK37380A HK 37380 A HK37380 A HK 37380A HK 373/80 A HK373/80 A HK 373/80A HK 37380 A HK37380 A HK 37380A HK 37380 A HK37380 A HK 37380A
Authority
HK
Hong Kong
Prior art keywords
binary multipliers
multipliers
binary
Prior art date
Application number
HK373/80A
Other languages
English (en)
Inventor
V S Negi
M T Miu
Original Assignee
Honeywell Inf Systems
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Inf Systems filed Critical Honeywell Inf Systems
Publication of HK37380A publication Critical patent/HK37380A/xx

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/523—Multiplying only
    • G06F7/527—Multiplying only in serial-parallel fashion, i.e. one operand being entered serially and the other in parallel
    • G06F7/5272—Multiplying only in serial-parallel fashion, i.e. one operand being entered serially and the other in parallel with row wise addition of partial products

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Complex Calculations (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
HK373/80A 1976-09-30 1980-07-10 Binary multipliers HK37380A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/728,093 US4086474A (en) 1976-09-30 1976-09-30 Multiplication technique in a data processing system

Publications (1)

Publication Number Publication Date
HK37380A true HK37380A (en) 1980-07-18

Family

ID=24925388

Family Applications (1)

Application Number Title Priority Date Filing Date
HK373/80A HK37380A (en) 1976-09-30 1980-07-10 Binary multipliers

Country Status (8)

Country Link
US (1) US4086474A (de)
JP (1) JPS5343445A (de)
AU (1) AU510638B2 (de)
CA (1) CA1096503A (de)
DE (1) DE2743575A1 (de)
FR (1) FR2366622A1 (de)
GB (1) GB1547329A (de)
HK (1) HK37380A (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4319325A (en) * 1978-07-24 1982-03-09 Intel Corporation Digital processor for processing analog signals
US4228518A (en) * 1978-09-25 1980-10-14 Motorola, Inc. Microprocessor having multiply/divide circuitry
JPS5899839A (ja) * 1981-12-10 1983-06-14 Toshiba Corp 符号付き乗算補正回路
US4577282A (en) * 1982-02-22 1986-03-18 Texas Instruments Incorporated Microcomputer system for digital signal processing
CA1202988A (en) * 1982-08-30 1986-04-08 Bernard Huang Wheel suspension with eccentric shear disc
NL8203520A (nl) * 1982-09-10 1984-04-02 Philips Nv Digitale filterinrichting.
US4475167A (en) * 1982-09-29 1984-10-02 National Semiconductor Corporation Fast coefficient calculator for speech
US4564920A (en) * 1982-12-02 1986-01-14 Mostek Corporation Multiplier with hybrid register
US4761756A (en) * 1983-08-24 1988-08-02 Amdahl Corporation Signed multiplier with three port adder and automatic adjustment for signed operands
US4829585A (en) * 1987-05-04 1989-05-09 Polaroid Corporation Electronic image processing circuit
US4868778A (en) * 1987-05-19 1989-09-19 Harris Corporation Speed enhancement for multipliers using minimal path algorithm
US4890253A (en) * 1988-12-28 1989-12-26 International Business Machines Corporation Predetermination of result conditions of decimal operations
US20090083350A1 (en) * 2007-09-24 2009-03-26 Montvelishsky Michael B Shift-add based random number generation

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3627999A (en) * 1969-11-28 1971-12-14 Comcet Inc Two{40 s complement negative number multiplying circuit
US3691359A (en) * 1970-07-28 1972-09-12 Singer General Precision Asynchronous binary multiplier employing carry-save addition
US3805043A (en) * 1972-10-11 1974-04-16 Bell Telephone Labor Inc Serial-parallel binary multiplication using pairwise addition
US3816732A (en) * 1973-03-29 1974-06-11 Rockland Systems Corp Apparatus and method for serial-parallel binary multiplication

Also Published As

Publication number Publication date
US4086474A (en) 1978-04-25
JPS5732807B2 (de) 1982-07-13
DE2743575A1 (de) 1978-04-06
JPS5343445A (en) 1978-04-19
CA1096503A (en) 1981-02-24
AU2864777A (en) 1979-03-15
AU510638B2 (en) 1980-07-03
FR2366622B1 (de) 1984-11-23
FR2366622A1 (fr) 1978-04-28
GB1547329A (en) 1979-06-13

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