HK18692A - Means and method for stabilising polycrystalline semiconductor layers - Google Patents

Means and method for stabilising polycrystalline semiconductor layers

Info

Publication number
HK18692A
HK18692A HK186/92A HK18692A HK18692A HK 18692 A HK18692 A HK 18692A HK 186/92 A HK186/92 A HK 186/92A HK 18692 A HK18692 A HK 18692A HK 18692 A HK18692 A HK 18692A
Authority
HK
Hong Kong
Prior art keywords
stabilising
semiconductor layers
polycrystalline semiconductor
polycrystalline
layers
Prior art date
Application number
HK186/92A
Inventor
Syd Robert Wilson
Richard Bayne Gregory
Charles Joseph Varker
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of HK18692A publication Critical patent/HK18692A/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28176—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation with a treatment, e.g. annealing, after the formation of the definitive gate conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3215—Doping the layers
    • H01L21/32155—Doping polycristalline - or amorphous silicon layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/024—Defect control-gettering and annealing
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/061—Gettering-armorphous layers
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/153—Solar cells-implantations-laser beam
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/914—Doping
    • Y10S438/92—Controlling diffusion profile by oxidation

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Element Separation (AREA)
HK186/92A 1986-01-21 1992-03-05 Means and method for stabilising polycrystalline semiconductor layers HK18692A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/821,095 US4682407A (en) 1986-01-21 1986-01-21 Means and method for stabilizing polycrystalline semiconductor layers

Publications (1)

Publication Number Publication Date
HK18692A true HK18692A (en) 1992-03-13

Family

ID=25232489

Family Applications (1)

Application Number Title Priority Date Filing Date
HK186/92A HK18692A (en) 1986-01-21 1992-03-05 Means and method for stabilising polycrystalline semiconductor layers

Country Status (5)

Country Link
US (1) US4682407A (en)
JP (1) JPH0732145B2 (en)
GB (1) GB2185623B (en)
HK (1) HK18692A (en)
SG (1) SG4492G (en)

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US4740481A (en) * 1986-01-21 1988-04-26 Motorola Inc. Method of preventing hillock formation in polysilicon layer by oxygen implanation
US4954454A (en) * 1986-12-16 1990-09-04 Matsushita Electric Industrial Co., Ltd. Method for fabricating a polycrystalline silicon resistor
US5240511A (en) * 1987-02-20 1993-08-31 National Semiconductor Corporation Lightly doped polycrystalline silicon resistor having a non-negative temperature coefficient
EP0350845A3 (en) * 1988-07-12 1991-05-29 Seiko Epson Corporation Semiconductor device with doped regions and method for manufacturing it
US5654209A (en) * 1988-07-12 1997-08-05 Seiko Epson Corporation Method of making N-type semiconductor region by implantation
US5037766A (en) * 1988-12-06 1991-08-06 Industrial Technology Research Institute Method of fabricating a thin film polysilicon thin film transistor or resistor
US4914046A (en) * 1989-02-03 1990-04-03 Motorola, Inc. Polycrystalline silicon device electrode and method
DE59010471D1 (en) * 1990-06-07 1996-10-02 Siemens Ag Process for the production of bipolar transistors with extremely reduced base-collector capacitance
US5064775A (en) * 1990-09-04 1991-11-12 Industrial Technology Research Institute Method of fabricating an improved polycrystalline silicon thin film transistor
US5108935A (en) * 1990-11-16 1992-04-28 Texas Instruments Incorporated Reduction of hot carrier effects in semiconductor devices by controlled scattering via the intentional introduction of impurities
EP0499979A3 (en) * 1991-02-16 1993-06-09 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device
JP4865076B2 (en) * 1993-09-02 2012-02-01 ルネサスエレクトロニクス株式会社 Manufacturing method of semiconductor device
JP2746099B2 (en) * 1994-01-27 1998-04-28 日本電気株式会社 Method for manufacturing semiconductor device
JP2803565B2 (en) * 1994-04-15 1998-09-24 株式会社デンソー Method for manufacturing semiconductor device
US5429972A (en) * 1994-05-09 1995-07-04 Advanced Micro Devices, Inc. Method of fabricating a capacitor with a textured polysilicon interface and an enhanced dielectric
JP3045946B2 (en) * 1994-05-09 2000-05-29 インターナショナル・ビジネス・マシーンズ・コーポレイション Method for manufacturing semiconductor device
US5593924A (en) * 1995-06-02 1997-01-14 Texas Instruments Incorporated Use of a capping layer to attain low titanium-silicide sheet resistance and uniform silicide thickness for sub-micron silicon and polysilicon lines
US5937310A (en) * 1996-04-29 1999-08-10 Advanced Micro Devices, Inc. Reduced bird's beak field oxidation process using nitrogen implanted into active region
US5882993A (en) 1996-08-19 1999-03-16 Advanced Micro Devices, Inc. Integrated circuit with differing gate oxide thickness and process for making same
US6033943A (en) * 1996-08-23 2000-03-07 Advanced Micro Devices, Inc. Dual gate oxide thickness integrated circuit and process for making same
US6080645A (en) 1996-10-29 2000-06-27 Micron Technology, Inc. Method of making a doped silicon diffusion barrier region
US5966626A (en) * 1996-11-07 1999-10-12 Mosel Vitelic, Inc. Method for stabilizing a silicon structure after ion implantation
US5739064A (en) * 1996-11-27 1998-04-14 Micron Technology, Inc. Second implanted matrix for agglomeration control and thermal stability
US5804496A (en) * 1997-01-08 1998-09-08 Advanced Micro Devices Semiconductor device having reduced overlap capacitance and method of manufacture thereof
US5926730A (en) * 1997-02-19 1999-07-20 Micron Technology, Inc. Conductor layer nitridation
JP3602679B2 (en) * 1997-02-26 2004-12-15 株式会社ルネサステクノロジ Semiconductor device and manufacturing method thereof
US5872376A (en) * 1997-03-06 1999-02-16 Advanced Micro Devices, Inc. Oxide formation technique using thin film silicon deposition
US5879975A (en) * 1997-09-05 1999-03-09 Advanced Micro Devices, Inc. Heat treating nitrogen implanted gate electrode layer for improved gate electrode etch profile
JP3451908B2 (en) * 1997-11-05 2003-09-29 信越半導体株式会社 SOI wafer heat treatment method and SOI wafer
US6030875A (en) * 1997-12-19 2000-02-29 Advanced Micro Devices, Inc. Method for making semiconductor device having nitrogen-rich active region-channel interface
US5962914A (en) * 1998-01-14 1999-10-05 Advanced Micro Devices, Inc. Reduced bird's beak field oxidation process using nitrogen implanted into active region
JPH11214683A (en) * 1998-01-26 1999-08-06 Mitsubishi Electric Corp Manufacture of semiconductor device and the semiconductor device
US6329703B1 (en) * 1998-02-25 2001-12-11 Infineon Technologies Ag Contact between a monocrystalline silicon region and a polycrystalline silicon structure and method for producing such a contact
US6531364B1 (en) 1998-08-05 2003-03-11 Advanced Micro Devices, Inc. Advanced fabrication technique to form ultra thin gate dielectric using a sacrificial polysilicon seed layer
EP0986095A3 (en) * 1998-09-08 2005-08-17 Infineon Technologies AG Layered structure with a material layer and a diffusion barrier layer disposed at the grain boundary of the material layer and process for fabricating the same
US6001713A (en) * 1998-09-16 1999-12-14 Advanced Micro Devices, Inc. Methods for forming nitrogen-rich regions in a floating gate and interpoly dielectric layer in a non-volatile semiconductor memory device
US6599829B2 (en) * 1998-11-25 2003-07-29 Texas Instruments Incorporated Method for photoresist strip, sidewall polymer removal and passivation for aluminum metallization
US6245636B1 (en) * 1999-10-20 2001-06-12 Advanced Micro Devices, Inc. Method of formation of pseudo-SOI structures with direct contact of transistor body to the substrate
US6465852B1 (en) 1999-10-20 2002-10-15 Advanced Micro Devices, Inc. Silicon wafer including both bulk and SOI regions and method for forming same on a bulk silicon wafer
US6376286B1 (en) 1999-10-20 2002-04-23 Advanced Micro Devices, Inc. Field effect transistor with non-floating body and method for forming same on a bulk silicon wafer
US6229187B1 (en) 1999-10-20 2001-05-08 Advanced Micro Devices, Inc. Field effect transistor with non-floating body and method for forming same on a bulk silicon wafer
US20030211711A1 (en) * 2002-03-28 2003-11-13 Hirofumi Seki Wafer processing method and ion implantation apparatus
US6737320B2 (en) * 2002-08-29 2004-05-18 Micron Technology, Inc. Double-doped polysilicon floating gate
JP4733519B2 (en) * 2002-10-25 2011-07-27 エリコン ソーラー アーゲー，トゥルーバッハ Manufacturing method of semiconductor device and semiconductor device obtained by this method
US7382028B2 (en) * 2005-04-15 2008-06-03 Taiwan Semiconductor Manufacturing Co., Ltd. Method for forming silicide and semiconductor device formed thereby
JPWO2021149380A1 (en) * 2020-01-24 2021-07-29

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US4230508A (en) * 1979-07-19 1980-10-28 Solarex Corporation Method of making semicrystalline silicon article
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Also Published As

Publication number Publication date
JPH0732145B2 (en) 1995-04-10
GB2185623B (en) 1989-11-01
GB2185623A (en) 1987-07-22
US4682407A (en) 1987-07-28
JPS62177919A (en) 1987-08-04
SG4492G (en) 1992-03-20
GB8630859D0 (en) 1987-02-04

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Legal Events

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PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)