HK1174116A1 - 多核計算機中的遠程核操作 - Google Patents

多核計算機中的遠程核操作

Info

Publication number
HK1174116A1
HK1174116A1 HK13101090.2A HK13101090A HK1174116A1 HK 1174116 A1 HK1174116 A1 HK 1174116A1 HK 13101090 A HK13101090 A HK 13101090A HK 1174116 A1 HK1174116 A1 HK 1174116A1
Authority
HK
Hong Kong
Prior art keywords
core
operations
remote
computer
core computer
Prior art date
Application number
HK13101090.2A
Other languages
English (en)
Inventor
．布萊克
．哈里斯
．麥基爾洛伊
．斯特勞斯
Original Assignee
微軟技術許可有限責任公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 微軟技術許可有限責任公司 filed Critical 微軟技術許可有限責任公司
Publication of HK1174116A1 publication Critical patent/HK1174116A1/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/167—Interprocessor communication using a common memory, e.g. mailbox
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0811—Multiuser, multiprocessor or multiprocessing cache systems with multilevel cache hierarchies
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815—Cache consistency protocols
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/084—Multiuser, multiprocessor or multiprocessing cache systems with a shared cache
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0842—Multiuser, multiprocessor or multiprocessing cache systems for multiprocessing or multitasking
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G06F12/1036—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] for multiple virtual address spaces, e.g. segmentation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1416—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights
    • G06F12/145—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being virtual, e.g. for virtual blocks or segments before a translation mechanism
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1458—Protection against unauthorised use of memory or access to memory by checking the subject access rights
    • G06F12/1483—Protection against unauthorised use of memory or access to memory by checking the subject access rights using an access-table, e.g. matrix or list
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1041—Resource optimization
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1056—Simplification
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/65—Details of virtual memory and virtual address translation
    • G06F2212/657—Virtual address space management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Software Systems (AREA)
  • Computer Security & Cryptography (AREA)
  • Mathematical Physics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Multi Processors (AREA)
HK13101090.2A 2011-02-11 2013-01-24 多核計算機中的遠程核操作 HK1174116A1 (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US13/025,446 US9471532B2 (en) 2011-02-11 2011-02-11 Remote core operations in a multi-core computer

Publications (1)

Publication Number Publication Date
HK1174116A1 true HK1174116A1 (zh) 2013-05-31

Family

ID=46562253

Family Applications (1)

Application Number Title Priority Date Filing Date
HK13101090.2A HK1174116A1 (zh) 2011-02-11 2013-01-24 多核計算機中的遠程核操作

Country Status (6)

Country Link
US (1) US9471532B2 (zh)
EP (1) EP2673717A4 (zh)
CN (1) CN102622329B (zh)
HK (1) HK1174116A1 (zh)
TW (1) TWI473013B (zh)
WO (1) WO2012109631A2 (zh)

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US9373182B2 (en) * 2012-08-17 2016-06-21 Intel Corporation Memory sharing via a unified memory architecture
US9582287B2 (en) * 2012-09-27 2017-02-28 Intel Corporation Processor having multiple cores, shared core extension logic, and shared core extension utilization instructions
US20140101405A1 (en) * 2012-10-05 2014-04-10 Advanced Micro Devices, Inc. Reducing cold tlb misses in a heterogeneous computing system
CN103853620B (zh) * 2012-11-30 2017-06-09 华为技术有限公司 一种众核处理器进程间相互通信的方法、装置及系统
US9026681B2 (en) 2013-08-08 2015-05-05 Qualcomm Incorporated Flexible hardware module assignment for enhanced performance
US9411745B2 (en) * 2013-10-04 2016-08-09 Qualcomm Incorporated Multi-core heterogeneous system translation lookaside buffer coherency
US9619012B2 (en) * 2014-05-30 2017-04-11 Apple Inc. Power level control using power assertion requests
US9396089B2 (en) 2014-05-30 2016-07-19 Apple Inc. Activity tracing diagnostic systems and methods
US9600442B2 (en) 2014-07-18 2017-03-21 Intel Corporation No-locality hint vector memory access processors, methods, systems, and instructions
US9424173B2 (en) 2014-10-23 2016-08-23 GlobalFoundries, Inc. Performing secure address relocation within a multi-processor system sharing a same physical memory channel to external memory
US9740617B2 (en) * 2014-12-23 2017-08-22 Intel Corporation Hardware apparatuses and methods to control cache line coherence
FR3061327B1 (fr) * 2016-12-26 2019-05-31 Thales Procede de controle d'un processeur multi-coeurs et calculateur associe
CN107038125B (zh) * 2017-04-25 2020-11-24 上海兆芯集成电路有限公司 具有加速预取请求的独立流水线的处理器高速缓存
US11314865B2 (en) * 2017-08-01 2022-04-26 The Trustees Of Princeton University Pluggable trust architecture
US10824584B1 (en) * 2018-04-03 2020-11-03 Xilinx, Inc. Device with data processing engine array that enables partial reconfiguration
CN110413210B (zh) * 2018-04-28 2023-05-30 伊姆西Ip控股有限责任公司 用于处理数据的方法、设备和计算机程序产品
CN108614460B (zh) * 2018-06-20 2020-11-06 东莞市李群自动化技术有限公司 分布式多节点控制系统及方法
CN109117291A (zh) * 2018-08-27 2019-01-01 惠州Tcl移动通信有限公司 基于多核处理器的数据调度处理方法、装置和计算机设备
US10860487B2 (en) * 2019-04-17 2020-12-08 Chengdu Haiguang Integrated Circuit Design Co. Ltd. Multi-core processing device and method of transferring data between cores thereof
CN113138711B (zh) * 2020-01-20 2023-11-17 北京希姆计算科技有限公司 一种存储管理装置及芯片
CN113515483A (zh) * 2020-04-10 2021-10-19 华为技术有限公司 一种数据传输方法及装置
CN112000608B (zh) * 2020-09-02 2021-10-01 展讯通信（上海）有限公司 系统级芯片及其中核间通信的方法、智能穿戴设备
US11954034B2 (en) * 2022-03-28 2024-04-09 Woven By Toyota, Inc. Cache coherency protocol for encoding a cache line with a domain shared state
CN115658569B (zh) * 2022-12-08 2023-04-14 井芯微电子技术(天津)有限公司 Amp多核处理器间中断与共享存储方法、系统及设备

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Also Published As

Publication number Publication date
EP2673717A2 (en) 2013-12-18
EP2673717A4 (en) 2018-01-10
US20120210071A1 (en) 2012-08-16
CN102622329A (zh) 2012-08-01
US9471532B2 (en) 2016-10-18
TW201234264A (en) 2012-08-16
WO2012109631A3 (en) 2012-10-18
CN102622329B (zh) 2015-12-02
TWI473013B (zh) 2015-02-11
WO2012109631A2 (en) 2012-08-16

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