CN102622329B - 多核计算机中的远程核操作 - Google Patents
多核计算机中的远程核操作 Download PDFInfo
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- CN102622329B CN102622329B CN201210030338.2A CN201210030338A CN102622329B CN 102622329 B CN102622329 B CN 102622329B CN 201210030338 A CN201210030338 A CN 201210030338A CN 102622329 B CN102622329 B CN 102622329B
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- 238000000034 method Methods 0.000 claims abstract description 148
- 230000008569 process Effects 0.000 claims abstract description 114
- 238000003860 storage Methods 0.000 claims abstract description 63
- 230000007246 mechanism Effects 0.000 claims abstract description 23
- 238000004891 communication Methods 0.000 claims description 18
- 238000013519 translation Methods 0.000 claims description 12
- 238000013507 mapping Methods 0.000 claims description 4
- 230000009471 action Effects 0.000 abstract description 5
- 238000010586 diagram Methods 0.000 description 18
- 230000006870 function Effects 0.000 description 17
- 230000005540 biological transmission Effects 0.000 description 13
- 230000005012 migration Effects 0.000 description 9
- 238000013508 migration Methods 0.000 description 9
- 230000004044 response Effects 0.000 description 9
- 230000008859 change Effects 0.000 description 6
- 238000006243 chemical reaction Methods 0.000 description 6
- 230000008901 benefit Effects 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 5
- 239000013598 vector Substances 0.000 description 5
- 238000004590 computer program Methods 0.000 description 4
- 238000012545 processing Methods 0.000 description 4
- 230000007704 transition Effects 0.000 description 4
- 238000007689 inspection Methods 0.000 description 3
- 230000003139 buffering effect Effects 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 235000013399 edible fruits Nutrition 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000004575 stone Substances 0.000 description 2
- 230000026676 system process Effects 0.000 description 2
- 241000590419 Polygonia interrogationis Species 0.000 description 1
- 230000002776 aggregation Effects 0.000 description 1
- 238000004220 aggregation Methods 0.000 description 1
- 230000000712 assembly Effects 0.000 description 1
- 238000000429 assembly Methods 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000005059 dormancy Effects 0.000 description 1
- 238000004134 energy conservation Methods 0.000 description 1
- 239000012634 fragment Substances 0.000 description 1
- 230000014759 maintenance of location Effects 0.000 description 1
- 238000007726 management method Methods 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 230000000644 propagated effect Effects 0.000 description 1
- 230000011664 signaling Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 210000003813 thumb Anatomy 0.000 description 1
- 230000001052 transient effect Effects 0.000 description 1
- 230000007306 turnover Effects 0.000 description 1
- 230000002618 waking effect Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
- G06F15/167—Interprocessor communication using a common memory, e.g. mailbox
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
- G06F12/0811—Multiuser, multiprocessor or multiprocessing cache systems with multilevel cache hierarchies
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
- G06F12/0815—Cache consistency protocols
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
- G06F12/084—Multiuser, multiprocessor or multiprocessing cache systems with a shared cache
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
- G06F12/0842—Multiuser, multiprocessor or multiprocessing cache systems for multiprocessing or multitasking
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
- G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
- G06F12/1036—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] for multiple virtual address spaces, e.g. segmentation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/14—Protection against unauthorised use of memory or access to memory
- G06F12/1416—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights
- G06F12/145—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being virtual, e.g. for virtual blocks or segments before a translation mechanism
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/14—Protection against unauthorised use of memory or access to memory
- G06F12/1458—Protection against unauthorised use of memory or access to memory by checking the subject access rights
- G06F12/1483—Protection against unauthorised use of memory or access to memory by checking the subject access rights using an access-table, e.g. matrix or list
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/10—Providing a specific technical effect
- G06F2212/1041—Resource optimization
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/10—Providing a specific technical effect
- G06F2212/1056—Simplification
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/65—Details of virtual memory and virtual address translation
- G06F2212/657—Virtual address space management
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Software Systems (AREA)
- Computer Security & Cryptography (AREA)
- Mathematical Physics (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Multi Processors (AREA)
Abstract
Description
Claims (8)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13/025,446 US9471532B2 (en) | 2011-02-11 | 2011-02-11 | Remote core operations in a multi-core computer |
US13/025,446 | 2011-02-11 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN102622329A CN102622329A (zh) | 2012-08-01 |
CN102622329B true CN102622329B (zh) | 2015-12-02 |
Family
ID=46562253
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201210030338.2A Active CN102622329B (zh) | 2011-02-11 | 2012-02-10 | 多核计算机中的远程核操作 |
Country Status (6)
Country | Link |
---|---|
US (1) | US9471532B2 (zh) |
EP (1) | EP2673717A4 (zh) |
CN (1) | CN102622329B (zh) |
HK (1) | HK1174116A1 (zh) |
TW (1) | TWI473013B (zh) |
WO (1) | WO2012109631A2 (zh) |
Families Citing this family (29)
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US10277510B2 (en) | 2011-08-02 | 2019-04-30 | Cavium, Llc | System and method for storing lookup request rules in multiple memories |
GB2495959A (en) * | 2011-10-26 | 2013-05-01 | Imagination Tech Ltd | Multi-threaded memory access processor |
US9373182B2 (en) * | 2012-08-17 | 2016-06-21 | Intel Corporation | Memory sharing via a unified memory architecture |
US9582287B2 (en) * | 2012-09-27 | 2017-02-28 | Intel Corporation | Processor having multiple cores, shared core extension logic, and shared core extension utilization instructions |
US20140101405A1 (en) * | 2012-10-05 | 2014-04-10 | Advanced Micro Devices, Inc. | Reducing cold tlb misses in a heterogeneous computing system |
CN103853620B (zh) * | 2012-11-30 | 2017-06-09 | 华为技术有限公司 | 一种众核处理器进程间相互通信的方法、装置及系统 |
US9026681B2 (en) | 2013-08-08 | 2015-05-05 | Qualcomm Incorporated | Flexible hardware module assignment for enhanced performance |
US9411745B2 (en) * | 2013-10-04 | 2016-08-09 | Qualcomm Incorporated | Multi-core heterogeneous system translation lookaside buffer coherency |
US9396089B2 (en) | 2014-05-30 | 2016-07-19 | Apple Inc. | Activity tracing diagnostic systems and methods |
US9665398B2 (en) * | 2014-05-30 | 2017-05-30 | Apple Inc. | Method and apparatus for activity based execution scheduling |
US9600442B2 (en) | 2014-07-18 | 2017-03-21 | Intel Corporation | No-locality hint vector memory access processors, methods, systems, and instructions |
US9424173B2 (en) | 2014-10-23 | 2016-08-23 | GlobalFoundries, Inc. | Performing secure address relocation within a multi-processor system sharing a same physical memory channel to external memory |
US9740617B2 (en) * | 2014-12-23 | 2017-08-22 | Intel Corporation | Hardware apparatuses and methods to control cache line coherence |
FR3061327B1 (fr) * | 2016-12-26 | 2019-05-31 | Thales | Procede de controle d'un processeur multi-coeurs et calculateur associe |
CN107038125B (zh) * | 2017-04-25 | 2020-11-24 | 上海兆芯集成电路有限公司 | 具有加速预取请求的独立流水线的处理器高速缓存 |
US11314865B2 (en) * | 2017-08-01 | 2022-04-26 | The Trustees Of Princeton University | Pluggable trust architecture |
US10824584B1 (en) * | 2018-04-03 | 2020-11-03 | Xilinx, Inc. | Device with data processing engine array that enables partial reconfiguration |
CN110413210B (zh) * | 2018-04-28 | 2023-05-30 | 伊姆西Ip控股有限责任公司 | 用于处理数据的方法、设备和计算机程序产品 |
CN108614460B (zh) * | 2018-06-20 | 2020-11-06 | 东莞市李群自动化技术有限公司 | 分布式多节点控制系统及方法 |
CN109117291A (zh) * | 2018-08-27 | 2019-01-01 | 惠州Tcl移动通信有限公司 | 基于多核处理器的数据调度处理方法、装置和计算机设备 |
US10860487B2 (en) * | 2019-04-17 | 2020-12-08 | Chengdu Haiguang Integrated Circuit Design Co. Ltd. | Multi-core processing device and method of transferring data between cores thereof |
CN113138711B (zh) * | 2020-01-20 | 2023-11-17 | 北京希姆计算科技有限公司 | 一种存储管理装置及芯片 |
CN113515483A (zh) * | 2020-04-10 | 2021-10-19 | 华为技术有限公司 | 一种数据传输方法及装置 |
CN112000608B (zh) * | 2020-09-02 | 2021-10-01 | 展讯通信(上海)有限公司 | 系统级芯片及其中核间通信的方法、智能穿戴设备 |
CN114281558A (zh) * | 2020-09-27 | 2022-04-05 | 安徽寒武纪信息科技有限公司 | 多核处理器、用于多核处理器的方法及相应产品 |
CN112527532B (zh) * | 2020-12-22 | 2024-11-15 | 杭州优万科技有限公司 | 一种基于消息的路径调度方法 |
US11954034B2 (en) * | 2022-03-28 | 2024-04-09 | Woven By Toyota, Inc. | Cache coherency protocol for encoding a cache line with a domain shared state |
US20230339499A1 (en) * | 2022-04-26 | 2023-10-26 | Motional Ad Llc | Distributed computing architecture with shared memory for autonomous robotic systems |
CN115658569B (zh) * | 2022-12-08 | 2023-04-14 | 井芯微电子技术(天津)有限公司 | Amp多核处理器间中断与共享存储方法、系统及设备 |
Citations (2)
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CN101510191A (zh) * | 2009-03-26 | 2009-08-19 | 浙江大学 | 具备缓存窗口的多核体系架构及其实现方法 |
CN101477511B (zh) * | 2008-12-31 | 2010-08-25 | 杭州华三通信技术有限公司 | 一种实现多操作系统共享存储介质的方法和装置 |
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CN101430651B (zh) | 2007-11-05 | 2012-01-11 | 中兴通讯股份有限公司 | 一种异构多核体系中外设的访问方法 |
US8417848B2 (en) * | 2007-11-20 | 2013-04-09 | Hangzhou H3C Technologies Co., Ltd. | Method and apparatus for implementing multiple service processing functions |
-
2011
- 2011-02-11 US US13/025,446 patent/US9471532B2/en active Active
-
2012
- 2012-01-11 TW TW101101125A patent/TWI473013B/zh not_active IP Right Cessation
- 2012-02-10 CN CN201210030338.2A patent/CN102622329B/zh active Active
- 2012-02-11 WO PCT/US2012/024776 patent/WO2012109631A2/en active Application Filing
- 2012-02-11 EP EP12744863.7A patent/EP2673717A4/en not_active Ceased
-
2013
- 2013-01-24 HK HK13101090.2A patent/HK1174116A1/zh unknown
Patent Citations (2)
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CN101477511B (zh) * | 2008-12-31 | 2010-08-25 | 杭州华三通信技术有限公司 | 一种实现多操作系统共享存储介质的方法和装置 |
CN101510191A (zh) * | 2009-03-26 | 2009-08-19 | 浙江大学 | 具备缓存窗口的多核体系架构及其实现方法 |
Also Published As
Publication number | Publication date |
---|---|
HK1174116A1 (zh) | 2013-05-31 |
US9471532B2 (en) | 2016-10-18 |
TWI473013B (zh) | 2015-02-11 |
EP2673717A2 (en) | 2013-12-18 |
TW201234264A (en) | 2012-08-16 |
US20120210071A1 (en) | 2012-08-16 |
EP2673717A4 (en) | 2018-01-10 |
WO2012109631A2 (en) | 2012-08-16 |
CN102622329A (zh) | 2012-08-01 |
WO2012109631A3 (en) | 2012-10-18 |
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