HK1070719A1 - Method to provide atomic update primitives in an asymmetric heterogeneous multiprocessor environment - Google Patents

Method to provide atomic update primitives in an asymmetric heterogeneous multiprocessor environment

Info

Publication number
HK1070719A1
HK1070719A1 HK05103951A HK05103951A HK1070719A1 HK 1070719 A1 HK1070719 A1 HK 1070719A1 HK 05103951 A HK05103951 A HK 05103951A HK 05103951 A HK05103951 A HK 05103951A HK 1070719 A1 HK1070719 A1 HK 1070719A1
Authority
HK
Hong Kong
Prior art keywords
atomic update
multiprocessor environment
provide atomic
heterogeneous multiprocessor
asymmetric heterogeneous
Prior art date
Application number
HK05103951A
Other languages
English (en)
Inventor
Michael N Day
Charles R Johns
James A Kahle
Peichum P Liu
Thuong Quang Truong
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of HK1070719A1 publication Critical patent/HK1070719A1/xx

Links

Classifications

    • A—HUMAN NECESSITIES
    • A47—FURNITURE; DOMESTIC ARTICLES OR APPLIANCES; COFFEE MILLS; SPICE MILLS; SUCTION CLEANERS IN GENERAL
    • A47G—HOUSEHOLD OR TABLE EQUIPMENT
    • A47G19/00—Table service
    • A47G19/22—Drinking vessels or saucers used for table service
    • A47G19/2205—Drinking glasses or vessels
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B65—CONVEYING; PACKING; STORING; HANDLING THIN OR FILAMENTARY MATERIAL
    • B65D—CONTAINERS FOR STORAGE OR TRANSPORT OF ARTICLES OR MATERIALS, e.g. BAGS, BARRELS, BOTTLES, BOXES, CANS, CARTONS, CRATES, DRUMS, JARS, TANKS, HOPPERS, FORWARDING CONTAINERS; ACCESSORIES, CLOSURES, OR FITTINGS THEREFOR; PACKAGING ELEMENTS; PACKAGES
    • B65D85/00—Containers, packaging elements or packages, specially adapted for particular articles or materials
    • B65D85/70—Containers, packaging elements or packages, specially adapted for particular articles or materials for materials not otherwise provided for
    • B65D85/804—Disposable containers or packages with contents which are mixed, infused or dissolved in situ, i.e. without having been previously removed from the package
    • B65D85/808—Disposable containers or packages with contents which are mixed, infused or dissolved in situ, i.e. without having been previously removed from the package for immersion in the liquid to release part or all of their contents, e.g. tea bags
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
    • G06F9/30087—Synchronisation or serialisation instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815—Cache consistency protocols
    • G06F12/0831—Cache consistency protocols using a bus scheme, e.g. with bus monitoring or watching means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0038—System on Chip

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mechanical Engineering (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Multi Processors (AREA)
HK05103951A 2003-05-22 2005-05-11 Method to provide atomic update primitives in an asymmetric heterogeneous multiprocessor environment HK1070719A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/443,727 US7114042B2 (en) 2003-05-22 2003-05-22 Method to provide atomic update primitives in an asymmetric heterogeneous multiprocessor environment

Publications (1)

Publication Number Publication Date
HK1070719A1 true HK1070719A1 (en) 2005-06-24

Family

ID=33450499

Family Applications (1)

Application Number Title Priority Date Filing Date
HK05103951A HK1070719A1 (en) 2003-05-22 2005-05-11 Method to provide atomic update primitives in an asymmetric heterogeneous multiprocessor environment

Country Status (6)

Country Link
US (2) US7114042B2 (xx)
JP (2) JP3974597B2 (xx)
KR (1) KR100641988B1 (xx)
CN (1) CN1273899C (xx)
HK (1) HK1070719A1 (xx)
TW (1) TWI269180B (xx)

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US8015380B2 (en) * 2008-02-01 2011-09-06 International Business Machines Corporation Launching multiple concurrent memory moves via a fully asynchronoous memory mover
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US9280348B2 (en) 2012-03-28 2016-03-08 International Business Machines Corporation Decode time instruction optimization for load reserve and store conditional sequences
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EP2862063B1 (en) * 2012-06-15 2022-09-14 Intel Corporation A lock-based and synch-based method for out of order loads in a memory consistency model using shared memory resources
KR101996351B1 (ko) 2012-06-15 2019-07-05 인텔 코포레이션 통합된 구조를 갖는 동적 디스패치 윈도우를 가지는 가상 load store 큐
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Also Published As

Publication number Publication date
JP2007122741A (ja) 2007-05-17
US7114042B2 (en) 2006-09-26
JP2004348734A (ja) 2004-12-09
KR20040100884A (ko) 2004-12-02
US20070016733A1 (en) 2007-01-18
US20040236914A1 (en) 2004-11-25
TW200511023A (en) 2005-03-16
CN1573715A (zh) 2005-02-02
CN1273899C (zh) 2006-09-06
TWI269180B (en) 2006-12-21
JP4730742B2 (ja) 2011-07-20
JP3974597B2 (ja) 2007-09-12
KR100641988B1 (ko) 2006-11-06
US7814281B2 (en) 2010-10-12

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Legal Events

Date Code Title Description
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)

Effective date: 20100518