HK1034333A1 - Processor utilizing template field instruction encoding - Google Patents

Processor utilizing template field instruction encoding

Info

Publication number
HK1034333A1
HK1034333A1 HK01104751.0A HK01104751A HK1034333A1 HK 1034333 A1 HK1034333 A1 HK 1034333A1 HK 01104751 A HK01104751 A HK 01104751A HK 1034333 A1 HK1034333 A1 HK 1034333A1
Authority
HK
Hong Kong
Prior art keywords
instruction encoding
field instruction
template field
processor utilizing
utilizing template
Prior art date
Application number
HK01104751.0A
Other languages
English (en)
Inventor
James M Hull
Kent Fielden
Hans Mulder
Harshvardhan Sharangpani
Original Assignee
Idea Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=25488837&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=HK1034333(A1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Idea Corp filed Critical Idea Corp
Publication of HK1034333A1 publication Critical patent/HK1034333A1/xx

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30072—Arrangements for executing specific machine instructions to perform conditional operations, e.g. using predicates or guards
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30094—Condition code generation, e.g. Carry, Zero flag
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G06F9/3013—Organisation of register space, e.g. banked or distributed register file according to data content, e.g. floating-point registers, address registers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/3016—Decoding the operand specifier, e.g. specifier format
    • G06F9/30167—Decoding the operand specifier, e.g. specifier format of immediate specifier, e.g. constants
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3853—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution of compound instructions

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
HK01104751.0A 1997-10-13 2001-07-10 Processor utilizing template field instruction encoding HK1034333A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/949,279 US5922065A (en) 1997-10-13 1997-10-13 Processor utilizing a template field for encoding instruction sequences in a wide-word format
PCT/US1998/021388 WO1999019793A1 (fr) 1997-10-13 1998-10-08 Processeur faisant appel a un codage d'instructions par champ de gabarit

Publications (1)

Publication Number Publication Date
HK1034333A1 true HK1034333A1 (en) 2001-10-19

Family

ID=25488837

Family Applications (1)

Application Number Title Priority Date Filing Date
HK01104751.0A HK1034333A1 (en) 1997-10-13 2001-07-10 Processor utilizing template field instruction encoding

Country Status (8)

Country Link
US (1) US5922065A (fr)
EP (1) EP1023660B1 (fr)
CN (1) CN100390729C (fr)
AU (1) AU9796498A (fr)
DE (1) DE69833008T2 (fr)
GB (1) GB0009284D0 (fr)
HK (1) HK1034333A1 (fr)
WO (1) WO1999019793A1 (fr)

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Also Published As

Publication number Publication date
EP1023660A4 (fr) 2001-08-01
CN1279783A (zh) 2001-01-10
DE69833008T2 (de) 2006-08-31
EP1023660A1 (fr) 2000-08-02
US5922065A (en) 1999-07-13
GB0009284D0 (en) 2000-05-31
WO1999019793A1 (fr) 1999-04-22
AU9796498A (en) 1999-05-03
CN100390729C (zh) 2008-05-28
EP1023660B1 (fr) 2005-12-28
DE69833008D1 (de) 2006-02-02

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PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)

Effective date: 20131008