GR67741B - - Google Patents

Info

Publication number
GR67741B
GR67741B GR61526A GR800161526A GR67741B GR 67741 B GR67741 B GR 67741B GR 61526 A GR61526 A GR 61526A GR 800161526 A GR800161526 A GR 800161526A GR 67741 B GR67741 B GR 67741B
Authority
GR
Greece
Application number
GR61526A
Other languages
Greek (el)
Inventor
Claude Athenes
Jacques Edmond Salle
Philippe Bloin
Original Assignee
Thomson Csf Mat Tel
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson Csf Mat Tel filed Critical Thomson Csf Mat Tel
Publication of GR67741B publication Critical patent/GR67741B/el

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/20Repeater circuits; Relay circuits
    • H04L25/24Relay circuits using discharge tubes or semiconductor devices
    • H04L25/242Relay circuits using discharge tubes or semiconductor devices with retiming
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0331Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
GR61526A 1979-03-26 1980-03-26 GR67741B (enExample)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7907536A FR2452828A1 (fr) 1979-03-26 1979-03-26 Dispositif de reconstitution d'horloge

Publications (1)

Publication Number Publication Date
GR67741B true GR67741B (enExample) 1981-09-16

Family

ID=9223569

Family Applications (1)

Application Number Title Priority Date Filing Date
GR61526A GR67741B (enExample) 1979-03-26 1980-03-26

Country Status (7)

Country Link
US (1) US4327442A (enExample)
EP (1) EP0016678B1 (enExample)
AU (1) AU5680480A (enExample)
BR (1) BR8001800A (enExample)
DE (1) DE3066790D1 (enExample)
FR (1) FR2452828A1 (enExample)
GR (1) GR67741B (enExample)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1200896B (it) * 1985-12-18 1989-01-27 Sgs Microelettronica Spa Circuito di risincronizzazione di segnali impulsivi,particolarmente per periferiche di microprocessori
FR2646742B1 (fr) * 1989-05-03 1994-01-07 Telecommunications Sa Dispositif pour synchroniser un signal pseudo-binaire avec un signal d'horloge regeneree a sauts de phase
US5138633A (en) * 1990-11-19 1992-08-11 At&T Bell Laboratories Method and apparatus for adaptively retiming and regenerating digital pulse signals

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3185963A (en) * 1960-11-25 1965-05-25 Stelma Inc Synchronizing system having reversible counter means
US3266024A (en) * 1962-05-31 1966-08-09 Ibm Synchronizing apparatus
US3576570A (en) * 1968-12-12 1971-04-27 Sperry Rand Corp Synchronous timing scheme for a data processing system
US3668315A (en) * 1970-05-15 1972-06-06 Hughes Aircraft Co Receiver timing and synchronization system
JPS5853809B2 (ja) * 1977-12-20 1983-12-01 日本電気株式会社 クロツクパルス再生回路

Also Published As

Publication number Publication date
FR2452828A1 (fr) 1980-10-24
EP0016678A1 (fr) 1980-10-01
FR2452828B1 (enExample) 1983-08-05
BR8001800A (pt) 1980-11-18
DE3066790D1 (en) 1984-04-12
AU5680480A (en) 1980-10-02
EP0016678B1 (fr) 1984-03-07
US4327442A (en) 1982-04-27

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