GB981906A - Improvements in or relating to magnetic core switching arrays - Google Patents

Abstract

981,906. Circuits enploying bi-stable magnetic elements. INTERNATIONAL BUSI. NESS MACHINES CORPORATION. April 13, 1962 [April 13, 1961; April 26, 1961], No. 14360/62. Heading H3B. To prevent spurious outputs due to partial switching of unselected cores in a co-ordinate magnetic switch, the output windings from the cores are connected in series with their respective loads, and the group of circuits so formed are connected in parallel, the parallel circuits either having a common return path which includes an inductance, Figs. 1, 4 and 7, or do not have a return path provided, Fig. 5. One row only of switching magnetic cores 10a-10n is shown in full lines in Fig. 1 and only one of the column wires 14. When the column and row wires 12, 14 are coincidently energized, only one core such as 10b is fully switched and an output pulse is induced in a single output wire 16b. This pulse passes through a load 18c such as a row or column 18 of a matrix memory, and returns through the parallel paths provided by output wires 16a and 16c to 16n and their loads 18, and the common return path 23 including inductance 24. The pulse returning through the unselected output circuits suppresses the spurious outputs due to partial switching of the unselected cores in the row. The inductance 24 is matched to the inductance of the partially switched cores, and for the period during which spurious voltages are induced constitutes a further parallel path of equivalent impedance. When however the partial switching of the unselected cores terminates, the remainder of the output pulse attains a steady value and the inductance 24 no longer restricts the flow of current through path 23. In a modification, Fig. 4, the inductance 24 is replaced by a switch core 32 not provided with an output load or column winding. A complete switching matrix of nine cores 10a to 10i is shown in Fig. 7, the common return path for a fully switched core output comprising wires 26, 28 and associated inductances 24. No common return path is provided in the arrangement shown in Fig. 5 which has the disadvantage that the initially high path impedance to the output pulse is maintained for the whole of its duration.