GB9723197D0 - Improved programmable logic cell array architecture - Google Patents

Improved programmable logic cell array architecture

Info

Publication number
GB9723197D0
GB9723197D0 GBGB9723197.1A GB9723197A GB9723197D0 GB 9723197 D0 GB9723197 D0 GB 9723197D0 GB 9723197 A GB9723197 A GB 9723197A GB 9723197 D0 GB9723197 D0 GB 9723197D0
Authority
GB
United Kingdom
Prior art keywords
programmable logic
cell array
logic cell
array architecture
improved programmable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GBGB9723197.1A
Other versions
GB2315897A (en
GB2315897B (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HP Inc
Original Assignee
Hewlett Packard Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US08/113,578 external-priority patent/US5315178A/en
Application filed by Hewlett Packard Co filed Critical Hewlett Packard Co
Publication of GB9723197D0 publication Critical patent/GB9723197D0/en
Publication of GB2315897A publication Critical patent/GB2315897A/en
Application granted granted Critical
Publication of GB2315897B publication Critical patent/GB2315897B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/106—Data output latches
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/1733—Controllable logic circuits
    • H03K19/1737—Controllable logic circuits using multiplexers

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
GB9723197A 1993-08-27 1994-08-24 Improved programmable logic cell array architecture Expired - Fee Related GB2315897B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/113,578 US5315178A (en) 1993-08-27 1993-08-27 IC which can be used as a programmable logic cell array or as a register file
GB9417139A GB2281427B (en) 1993-08-27 1994-08-24 Improved programmable logic cell array architecture

Publications (3)

Publication Number Publication Date
GB9723197D0 true GB9723197D0 (en) 1998-01-07
GB2315897A GB2315897A (en) 1998-02-11
GB2315897B GB2315897B (en) 1998-03-18

Family

ID=26305513

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9723197A Expired - Fee Related GB2315897B (en) 1993-08-27 1994-08-24 Improved programmable logic cell array architecture

Country Status (1)

Country Link
GB (1) GB2315897B (en)

Also Published As

Publication number Publication date
GB2315897A (en) 1998-02-11
GB2315897B (en) 1998-03-18

Similar Documents

Publication Publication Date Title
GB2281427B (en) Improved programmable logic cell array architecture
GB2280293B (en) Architecture for programmable logic
KR0139869B1 (en) Field programmable gate array
GB2269285B (en) Configurable logic cell
TW441662U (en) Cell material structure
GB2300948B (en) Techniques for programming programmable logic array devices
EP0245884A3 (en) Programmable array logic cell
SG104910A1 (en) Field programmable memory array
EP0819340A4 (en) Logic cell and routing architecture in a field programmable gate array
GB9614800D0 (en) Programmable logic arrays
AU8325487A (en) Programmable logic cell and array
GB9706594D0 (en) Logic cell for programmable logic devices
IL125126A (en) Electroconversion cell
GB9300449D0 (en) Programmable logic cell
EP1020030A4 (en) Programmable gate array
EP0337676A3 (en) Programmable logic array
GB2267613B (en) Programmable logic cell
GB2308908B (en) Memory cell array
GB9310177D0 (en) Cell specific necrosis
GB2315897B (en) Improved programmable logic cell array architecture
EP0645700A3 (en) Programmable logic array.
GB2312308B (en) Configurable logic array
GB9505060D0 (en) Programmable gate array
GB2315348B (en) Programmable logic arrays
GB9211678D0 (en) The programmable logic cell

Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 19990824