GB9718417D0 - Memory addressing method and system - Google Patents

Memory addressing method and system

Info

Publication number
GB9718417D0
GB9718417D0 GBGB9718417.0A GB9718417A GB9718417D0 GB 9718417 D0 GB9718417 D0 GB 9718417D0 GB 9718417 A GB9718417 A GB 9718417A GB 9718417 D0 GB9718417 D0 GB 9718417D0
Authority
GB
United Kingdom
Prior art keywords
addressing method
memory addressing
memory
addressing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GBGB9718417.0A
Other versions
GB2328765A (en
GB2328765B (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Germany GmbH
Original Assignee
Motorola GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola GmbH filed Critical Motorola GmbH
Priority to GB9718417A priority Critical patent/GB2328765B/en
Publication of GB9718417D0 publication Critical patent/GB9718417D0/en
Publication of GB2328765A publication Critical patent/GB2328765A/en
Application granted granted Critical
Publication of GB2328765B publication Critical patent/GB2328765B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/76—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data
    • G06F7/78—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data for changing the order of data flow, e.g. matrix transposition or LIFO buffers; Overflow or underflow handling therefor
    • G06F7/785—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data for changing the order of data flow, e.g. matrix transposition or LIFO buffers; Overflow or underflow handling therefor having a sequence of storage locations each being individually accessible for both enqueue and dequeue operations, e.g. using a RAM
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/76—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data
    • G06F7/768—Data position reversal, e.g. bit reversal, byte swapping

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Television Systems (AREA)
GB9718417A 1997-08-29 1997-08-29 Memory addressing method and system Expired - Fee Related GB2328765B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB9718417A GB2328765B (en) 1997-08-29 1997-08-29 Memory addressing method and system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB9718417A GB2328765B (en) 1997-08-29 1997-08-29 Memory addressing method and system

Publications (3)

Publication Number Publication Date
GB9718417D0 true GB9718417D0 (en) 1997-11-05
GB2328765A GB2328765A (en) 1999-03-03
GB2328765B GB2328765B (en) 2003-03-26

Family

ID=10818279

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9718417A Expired - Fee Related GB2328765B (en) 1997-08-29 1997-08-29 Memory addressing method and system

Country Status (1)

Country Link
GB (1) GB2328765B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100306282B1 (en) * 1998-12-10 2001-11-02 윤종용 Apparatus and for interleaving and deinterleaving frame date in communication system
US6541367B1 (en) 2000-01-18 2003-04-01 Applied Materials, Inc. Very low dielectric constant plasma-enhanced CVD films

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2950703B2 (en) * 1992-04-30 1999-09-20 シャープ株式会社 Address generator, inverted field sequence generator and digit inverted sequence signal generating method for digit inversion for fast Fourier transform

Also Published As

Publication number Publication date
GB2328765A (en) 1999-03-03
GB2328765B (en) 2003-03-26

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20090829