GB968230A - Method of producing semiconductor devices - Google Patents

Method of producing semiconductor devices

Info

Publication number
GB968230A
GB968230A GB120862A GB120862A GB968230A GB 968230 A GB968230 A GB 968230A GB 120862 A GB120862 A GB 120862A GB 120862 A GB120862 A GB 120862A GB 968230 A GB968230 A GB 968230A
Authority
GB
United Kingdom
Prior art keywords
nickel
layer
junction
lead
gold
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB120862A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BBC Brown Boveri AG Switzerland
BBC Brown Boveri France SA
Original Assignee
BBC Brown Boveri AG Switzerland
BBC Brown Boveri France SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by BBC Brown Boveri AG Switzerland, BBC Brown Boveri France SA filed Critical BBC Brown Boveri AG Switzerland
Publication of GB968230A publication Critical patent/GB968230A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0657Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
    • H01L29/0661Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body specially adapted for altering the breakdown voltage by removing semiconductor material at, or in the neighbourhood of, a reverse biased junction, e.g. by bevelling, moat etching, depletion etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304Mechanical treatment, e.g. grinding, polishing, cutting

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Weting (AREA)
  • Thyristors (AREA)

Abstract

968,230. Semi-conductor devices. BROWN, BOVERI & CO. Ltd. Jan. 12, 1962 [Jan. 13, 1961], No. 1208/62. Heading H1K. A method of producing semi-conductor elements with PN junctions comprises forming a layer of opposite conductivity type on a body of semi-conductor material of the other conductivity type and then coating the body with a layer of nickel, an element then being cut out of the body perpendicularly to the nickel layer and the adjacent PN junction of one face and being ground so that the element is bevelled to reduce the area of the nickel coating and to expose the edge of the PN junction within the area of the bevel. As compared with customary Mesa constructions the invention increases the distance between the edge of the PN junction and the nickel coat which constitutes an electrode. As shown in Fig. 5, the body 1 of silicon has an impurity layer 2 formed by diffusion, the layer having been removed from the bottom surface and replaced by a doped layer 4 for the injection of majority carriers. The whole of body 1 is coated with nickel 5 which may be protected against subsequent etching by a gold topcoat. The body is then cut, by a cutting tool or by a tool with the use of a grinding medium, to have the shape shown in Fig. 6, the plan view corresponding to which is circular. On one side of the element the nickel coat is reduced in area to the disc 7 and at the midpoint of the bevel 6 the PN junction 8 is exposed. Gold, silver, or base metal leads may be connected to the nickel layers 7 and 5 on opposite sides of the element by means of a lead or lead alloy solder. The element may be etched to remove lattice defects due to grinding, but this is not necessary if the grinding medium is fine enough. If etching is employed it may be done before or after the attachment of leads and if employed in the latter case when the leads are of base metal, such as copper, they must be protected with a coat of gold, silver or lead, and the lead or lead alloy solder is chlorinated. The resulting element has a P+PN structure.
GB120862A 1961-01-13 1962-01-12 Method of producing semiconductor devices Expired GB968230A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DEB60834A DE1154871B (en) 1961-01-13 1961-01-13 Method for producing semiconductor components with at least one pn junction

Publications (1)

Publication Number Publication Date
GB968230A true GB968230A (en) 1964-09-02

Family

ID=6972991

Family Applications (1)

Application Number Title Priority Date Filing Date
GB120862A Expired GB968230A (en) 1961-01-13 1962-01-12 Method of producing semiconductor devices

Country Status (3)

Country Link
CH (1) CH397878A (en)
DE (1) DE1154871B (en)
GB (1) GB968230A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3268309A (en) * 1964-03-30 1966-08-23 Gen Electric Semiconductor contact means
US3368120A (en) * 1965-03-22 1968-02-06 Gen Electric Multilayer contact system for semiconductor devices

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL215949A (en) * 1956-04-03
NL241982A (en) * 1958-08-13 1900-01-01
FR1213751A (en) * 1958-10-27 1960-04-04 Telecommunications Sa Process for manufacturing transistrons with n-p-n junctions obtained by double diffusion
FR1228285A (en) * 1959-03-11 1960-08-29 Semiconductor structures for parametric microwave amplifier

Also Published As

Publication number Publication date
DE1154871B (en) 1963-09-26
CH397878A (en) 1965-08-31

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