GB967256A - Lock out circuit for automatic telephone exchange - Google Patents

Lock out circuit for automatic telephone exchange

Info

Publication number
GB967256A
GB967256A GB1847460A GB1847460A GB967256A GB 967256 A GB967256 A GB 967256A GB 1847460 A GB1847460 A GB 1847460A GB 1847460 A GB1847460 A GB 1847460A GB 967256 A GB967256 A GB 967256A
Authority
GB
United Kingdom
Prior art keywords
links
link
point
out circuit
busy
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB1847460A
Inventor
Donald Brian Delanoy
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pye Electronic Products Ltd
Original Assignee
Pye Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pye Ltd filed Critical Pye Ltd
Priority to GB1847460A priority Critical patent/GB967256A/en
Priority to FR862515A priority patent/FR1297813A/en
Priority to DEP27190A priority patent/DE1197131B/en
Publication of GB967256A publication Critical patent/GB967256A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/52—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker using static devices in switching stages, e.g. electronic switching arrangements
    • H04Q3/521—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker using static devices in switching stages, e.g. electronic switching arrangements using semiconductors in the switching stages
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/084—Diode-transistor logic

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Interface Circuits In Exchanges (AREA)
  • Exchange Systems With Centralized Control (AREA)

Abstract

967,256. Automatic exchange systems. PYE Ltd. May 24, 1961 [May 25, 1960], No. 18474/60. Heading H4K. In an exchange in which calling and called subscribers are connected electrically to one of a plurality of links, a lock-out circuit, comprising a transistor operated over a diode or-gate from the links, is provided which is operable to prevent a calling subscriber from being connected to a link when all the links are busy. As shown, positive potentials are applied to rectifiers MR1 . . . MR3 when associated links are busy. This cuts off transistor T1, so that T2 is also cut off and T3 conducts. Terminal 4 may now assume any negative potential, so enabling a subscriber to connect to a link. When all links are busy, however, T1 conducts, the resulting current through R1 to point 4 causing T2 to conduct and T3 to cut off, the latter increasing the value of the negative potential applied to the base of T1 to ensure that it stays conducting irrespective of a link becoming free. With T1 conducting, the point 4 is clamped to a point near earth potential and this disables cold cathode tubes which connect the subscribers to the links. A subscriber can only seize a free link when it becomes free by first hanging up, whereby point 4 is disconnected so that T2 cuts off, whereupon T3 conducts to cut off T1. The lock-out circuit described in Specification 967,252 is also described.
GB1847460A 1960-05-25 1960-05-25 Lock out circuit for automatic telephone exchange Expired GB967256A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
GB1847460A GB967256A (en) 1960-05-25 1960-05-25 Lock out circuit for automatic telephone exchange
FR862515A FR1297813A (en) 1960-05-25 1961-05-23 Interlock circuit in case of overload for electronic automatic telephone switch
DEP27190A DE1197131B (en) 1960-05-25 1961-05-23 Lock circuit for telephone exchange systems

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB1847460A GB967256A (en) 1960-05-25 1960-05-25 Lock out circuit for automatic telephone exchange

Publications (1)

Publication Number Publication Date
GB967256A true GB967256A (en) 1964-08-19

Family

ID=10113056

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1847460A Expired GB967256A (en) 1960-05-25 1960-05-25 Lock out circuit for automatic telephone exchange

Country Status (2)

Country Link
DE (1) DE1197131B (en)
GB (1) GB967256A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4151374A (en) * 1976-05-10 1979-04-24 Hitachi, Ltd. Bus connection detector circuit for bus connection matrix circuit

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1071769B (en) * 1959-12-24
GB807126A (en) * 1956-03-26 1959-01-07 Siemens Edison Swan Ltd Improvements relating to selector systems
DE1005567B (en) * 1956-05-03 1957-04-04 Siemens Ag Circuit arrangement for an electrical test multiplexer for telecommunications, in particular telephone systems
DE1010574B (en) * 1956-06-23 1957-06-19 Standard Elektrik Ag Circuit arrangement for test circuits to prevent double assignments

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4151374A (en) * 1976-05-10 1979-04-24 Hitachi, Ltd. Bus connection detector circuit for bus connection matrix circuit

Also Published As

Publication number Publication date
DE1197131B (en) 1965-07-22

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