GB9602024D0 - Processing cycle control in a data processing apparatus - Google Patents
Processing cycle control in a data processing apparatusInfo
- Publication number
- GB9602024D0 GB9602024D0 GBGB9602024.3A GB9602024A GB9602024D0 GB 9602024 D0 GB9602024 D0 GB 9602024D0 GB 9602024 A GB9602024 A GB 9602024A GB 9602024 D0 GB9602024 D0 GB 9602024D0
- Authority
- GB
- United Kingdom
- Prior art keywords
- cycle control
- processing apparatus
- data processing
- processing cycle
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30032—Movement instructions, e.g. MOVE, SHIFT, ROTATE, SHUFFLE
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
- G06F9/3016—Decoding the operand specifier, e.g. specifier format
- G06F9/30167—Decoding the operand specifier, e.g. specifier format of immediate specifier, e.g. constants
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30181—Instruction operation extension or modification
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3853—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution of compound instructions
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9602024A GB2309803B (en) | 1996-02-01 | 1996-02-01 | Processing cycle control in a data processing apparatus |
JP01830897A JP3619343B2 (en) | 1996-02-01 | 1997-01-31 | Data processing apparatus and method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9602024A GB2309803B (en) | 1996-02-01 | 1996-02-01 | Processing cycle control in a data processing apparatus |
Publications (3)
Publication Number | Publication Date |
---|---|
GB9602024D0 true GB9602024D0 (en) | 1996-04-03 |
GB2309803A GB2309803A (en) | 1997-08-06 |
GB2309803B GB2309803B (en) | 2000-01-26 |
Family
ID=10787933
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB9602024A Expired - Fee Related GB2309803B (en) | 1996-02-01 | 1996-02-01 | Processing cycle control in a data processing apparatus |
Country Status (2)
Country | Link |
---|---|
JP (1) | JP3619343B2 (en) |
GB (1) | GB2309803B (en) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6862563B1 (en) | 1998-10-14 | 2005-03-01 | Arc International | Method and apparatus for managing the configuration and functionality of a semiconductor design |
AU4848100A (en) * | 1999-05-13 | 2000-12-05 | Arc International U.S. Holdings Inc. | Method and apparatus for loose register encoding within a pipelined processor |
AU2001243463A1 (en) | 2000-03-10 | 2001-09-24 | Arc International Plc | Memory interface and method of interfacing between functional entities |
US8127113B1 (en) | 2006-12-01 | 2012-02-28 | Synopsys, Inc. | Generating hardware accelerators and processor offloads |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3036849C1 (en) * | 1980-09-30 | 1981-11-26 | Computer Gesellschaft Konstanz Mbh, 7750 Konstanz | Circuit arrangement for controlling microinstructions with different execution times |
-
1996
- 1996-02-01 GB GB9602024A patent/GB2309803B/en not_active Expired - Fee Related
-
1997
- 1997-01-31 JP JP01830897A patent/JP3619343B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP3619343B2 (en) | 2005-02-09 |
GB2309803B (en) | 2000-01-26 |
GB2309803A (en) | 1997-08-06 |
JPH09223009A (en) | 1997-08-26 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 20140201 |