GB958565A - Logical circuit - Google Patents
Logical circuitInfo
- Publication number
- GB958565A GB958565A GB1834260A GB1834260A GB958565A GB 958565 A GB958565 A GB 958565A GB 1834260 A GB1834260 A GB 1834260A GB 1834260 A GB1834260 A GB 1834260A GB 958565 A GB958565 A GB 958565A
- Authority
- GB
- United Kingdom
- Prior art keywords
- inputs
- current
- pulse
- transformer
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
- G06F5/01—Methods or arrangements for data conversion without changing the order or content of the data handled for shifting, e.g. justifying, scaling, normalising
- G06F5/012—Methods or arrangements for data conversion without changing the order or content of the data handled for shifting, e.g. justifying, scaling, normalising in floating-point computations
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
- G06F5/01—Methods or arrangements for data conversion without changing the order or content of the data handled for shifting, e.g. justifying, scaling, normalising
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/483—Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/16—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using saturable magnetic devices
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computing Systems (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Nonlinear Science (AREA)
- Dc Digital Transmission (AREA)
- Interface Circuits In Exchanges (AREA)
Abstract
958,565. Logical switching circuits. NIPPON TELEGRAPH & TELEPHONE PUBLIC CORPORATION. May 24, 1960 [May 25, 1959], No. 18342/60. Heading H3T. [Also in Division G4] A logical switching network whereby any one of a plurality of transmission paths between each of a plurality of first points and at least one second point is completed by the simultaneous application of a first signal to one or more devices (e.g. transistors or diodes) to render the path conductive and of a second signal via the primary winding of a corresponding one of a plurality of transformers whose secondary windings supply the energy to produce flow of electric current in a respective transmission path or one of a group of respective transmission paths. In Fig. 2 the application of a continuity-completing pulse to the emitter of transistor H 1 at x 1 and a current-supply pulse to the primary winding of transformer L 2 at y 2 causes current to flow in a path P and produce an output across a corresponding load resistor R at u 2 . Diodes d 1 , d 2 , d 3 prevent current flow in paths such as those indicated by arrows P<SP>1</SP>, P<SP>11</SP>. The inputs x 1 , x 2 , x 3 may be alternatively applied to the base electrodes of their corresponding transistors, Fig. 6 (not shown). Fig. 3 shows how transistors H 1 , H 2 , H 3 may be replaced by diodes d<SP>1</SP> selectively rendered conductive by the outputs of bi-stable circuits F 1 , F 2 , F 3 . In Fig. 8, the application of a switching-on pulse to transistor H between terminals x, x<SP>1</SP> results also in an output at terminal u unless a current-supply pulse is applied to one or more of inputs y 1 , y 2 , y 3 when the current flowing in the lower half of the split primary of the output transformer cancels that flowing in the upper half. Fig. 11 shows a circuit for displacing the digits of a binary number by any selected one of a number digit positions. The inputs x represent the digits of the input binary number and the inputs Y the displacement to be effected, the suffixes indicating the magnitude of the displacement. Thus the application of a pulse at YÁ will cause the displacement of the binary number applied at x by Á digit positions. To achieve thus, terminals (1, Á), (2, Á) ... (n, Á) are connected to corresponding terminals (1, Á)<SP>1</SP>, (2, Á)<SP>1</SP> . . .(n, Á)<SP>1</SP> via primary windings of successive transformers T# so that the digit corresponding to input x 1 produces an output u in the secondary winding of the (Á + 1)th transformer, that corresponding to input x 2 in the secondary winding of the (Á + 2)th transformer and so on. Fig. 14 shows a modified form of shift circuit in which the current supply inputs Y are inserted between the digit inputs x and the outputs u developed across resistors R u .
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1633259 | 1959-05-25 | ||
JP740660 | 1960-03-10 |
Publications (1)
Publication Number | Publication Date |
---|---|
GB958565A true GB958565A (en) | 1964-05-21 |
Family
ID=26341692
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB1834260A Expired GB958565A (en) | 1959-05-25 | 1960-05-24 | Logical circuit |
Country Status (4)
Country | Link |
---|---|
CH (1) | CH420264A (en) |
DE (1) | DE1424728A1 (en) |
GB (1) | GB958565A (en) |
NL (1) | NL251984A (en) |
-
0
- NL NL251984D patent/NL251984A/xx unknown
-
1960
- 1960-05-24 DE DE19601424728 patent/DE1424728A1/en active Pending
- 1960-05-24 GB GB1834260A patent/GB958565A/en not_active Expired
- 1960-05-25 CH CH616460A patent/CH420264A/en unknown
Also Published As
Publication number | Publication date |
---|---|
CH420264A (en) | 1966-09-15 |
NL251984A (en) | |
DE1424728A1 (en) | 1968-10-31 |
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