GB9417926D0 - Interconnection structure - Google Patents
Interconnection structureInfo
- Publication number
- GB9417926D0 GB9417926D0 GB9417926A GB9417926A GB9417926D0 GB 9417926 D0 GB9417926 D0 GB 9417926D0 GB 9417926 A GB9417926 A GB 9417926A GB 9417926 A GB9417926 A GB 9417926A GB 9417926 D0 GB9417926 D0 GB 9417926D0
- Authority
- GB
- United Kingdom
- Prior art keywords
- interconnection
- polymer film
- via openings
- connects
- disposed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
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- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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- H01L2924/1579—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
Abstract
A plurality of integrated circuit chips 1 each has one or more interconnection pads 2 disposed thereon. A polymer film 4 overlies the integrated circuits 1 and has a plurality of via openings 7 therein. Some of the via openings 7 are aligned with at least some of the interconnection pads 2. A pattern of interconnection conductors 5 disposed on one side of the polymer film 4 connects at least some of the via openings 7, and a conducting substance 8 connects at least some the interconnection conductors 5 to at least some of the interconnection pads 2. The polymer film acts as the sole mounting substrate for the chips. <IMAGE>
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB939318573A GB9318573D0 (en) | 1993-09-08 | 1993-09-08 | Bonding process for producing multiple simultaneous connections between silicon di and a substrate |
Publications (2)
Publication Number | Publication Date |
---|---|
GB9417926D0 true GB9417926D0 (en) | 1994-10-26 |
GB2281814A GB2281814A (en) | 1995-03-15 |
Family
ID=10741667
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB939318573A Pending GB9318573D0 (en) | 1993-09-08 | 1993-09-08 | Bonding process for producing multiple simultaneous connections between silicon di and a substrate |
GB9417926A Withdrawn GB2281814A (en) | 1993-09-08 | 1994-09-06 | Film carrier with interconnections for I.C. chips |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB939318573A Pending GB9318573D0 (en) | 1993-09-08 | 1993-09-08 | Bonding process for producing multiple simultaneous connections between silicon di and a substrate |
Country Status (1)
Country | Link |
---|---|
GB (2) | GB9318573D0 (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5527741A (en) * | 1994-10-11 | 1996-06-18 | Martin Marietta Corporation | Fabrication and structures of circuit modules with flexible interconnect layers |
US10141251B2 (en) * | 2014-12-23 | 2018-11-27 | General Electric Company | Electronic packages with pre-defined via patterns and methods of making and using the same |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2137805B (en) * | 1982-11-19 | 1987-01-28 | Stanley Bracey | Chip carrier |
US4937707A (en) * | 1988-05-26 | 1990-06-26 | International Business Machines Corporation | Flexible carrier for an electronic device |
SG49842A1 (en) * | 1988-11-09 | 1998-06-15 | Nitto Denko Corp | Wiring substrate film carrier semiconductor device made by using the film carrier and mounting structure comprising the semiconductor |
EP0482940B1 (en) * | 1990-10-24 | 1996-03-27 | Nec Corporation | Method of forming an electrical connection for an integrated circuit |
US5252857A (en) * | 1991-08-05 | 1993-10-12 | International Business Machines Corporation | Stacked DCA memory chips |
-
1993
- 1993-09-08 GB GB939318573A patent/GB9318573D0/en active Pending
-
1994
- 1994-09-06 GB GB9417926A patent/GB2281814A/en not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
GB2281814A (en) | 1995-03-15 |
GB9318573D0 (en) | 1993-10-27 |
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Legal Events
Date | Code | Title | Description |
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WAP | Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1) |