GB9216731D0 - Segment descriptor cache for a microprocessor - Google Patents

Segment descriptor cache for a microprocessor

Info

Publication number
GB9216731D0
GB9216731D0 GB929216731A GB9216731A GB9216731D0 GB 9216731 D0 GB9216731 D0 GB 9216731D0 GB 929216731 A GB929216731 A GB 929216731A GB 9216731 A GB9216731 A GB 9216731A GB 9216731 D0 GB9216731 D0 GB 9216731D0
Authority
GB
United Kingdom
Prior art keywords
microprocessor
segment descriptor
descriptor cache
cache
segment
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB929216731A
Other versions
GB2260629B (en
GB2260629A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of GB9216731D0 publication Critical patent/GB9216731D0/en
Publication of GB2260629A publication Critical patent/GB2260629A/en
Application granted granted Critical
Publication of GB2260629B publication Critical patent/GB2260629B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0875—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with dedicated cache, e.g. instruction or stack
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/0292—User address space allocation, e.g. contiguous or non contiguous base addressing using tables or multilevel address translation means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G06F12/1036—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] for multiple virtual address spaces, e.g. segmentation

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
GB9216731A 1991-10-16 1992-08-06 A segment descriptor cache for a microprocessor Expired - Fee Related GB2260629B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US77715591A 1991-10-16 1991-10-16

Publications (3)

Publication Number Publication Date
GB9216731D0 true GB9216731D0 (en) 1992-09-23
GB2260629A GB2260629A (en) 1993-04-21
GB2260629B GB2260629B (en) 1995-07-26

Family

ID=25109440

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9216731A Expired - Fee Related GB2260629B (en) 1991-10-16 1992-08-06 A segment descriptor cache for a microprocessor

Country Status (4)

Country Link
JP (1) JPH05210593A (en)
DE (1) DE4234194A1 (en)
FR (1) FR2683061B1 (en)
GB (1) GB2260629B (en)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5895489A (en) * 1991-10-16 1999-04-20 Intel Corporation Memory management system including an inclusion bit for maintaining cache coherency
US5590297A (en) * 1994-01-04 1996-12-31 Intel Corporation Address generation unit with segmented addresses in a mircroprocessor
US6041396A (en) * 1996-03-14 2000-03-21 Advanced Micro Devices, Inc. Segment descriptor cache addressed by part of the physical address of the desired descriptor
US7174457B1 (en) 1999-03-10 2007-02-06 Microsoft Corporation System and method for authenticating an operating system to a central processing unit, providing the CPU/OS with secure storage, and authenticating the CPU/OS to a third party
US6609199B1 (en) 1998-10-26 2003-08-19 Microsoft Corporation Method and apparatus for authenticating an open system application to a portable IC device
US6651171B1 (en) * 1999-04-06 2003-11-18 Microsoft Corporation Secure execution of program code
US6775779B1 (en) 1999-04-06 2004-08-10 Microsoft Corporation Hierarchical trusted code for content protection in computers
US6757824B1 (en) 1999-12-10 2004-06-29 Microsoft Corporation Client-side boot domains and boot rules
US6938164B1 (en) 2000-11-22 2005-08-30 Microsoft Corporation Method and system for allowing code to be securely initialized in a computer
US7159240B2 (en) 2001-11-16 2007-01-02 Microsoft Corporation Operating system upgrades in a trusted operating system environment
US7243230B2 (en) 2001-11-16 2007-07-10 Microsoft Corporation Transferring application secrets in a trusted operating system environment
US7890771B2 (en) 2002-04-17 2011-02-15 Microsoft Corporation Saving and retrieving data based on public key encryption
US7487365B2 (en) 2002-04-17 2009-02-03 Microsoft Corporation Saving and retrieving data based on symmetric key encryption

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3800286A (en) * 1972-08-24 1974-03-26 Honeywell Inf Systems Address development technique utilizing a content addressable memory
GB2176918B (en) * 1985-06-13 1989-11-01 Intel Corp Memory management for microprocessor system
AU603167B2 (en) * 1986-12-23 1990-11-08 Bull Hn Information Systems Inc. Segment descriptor unit
JPS63259749A (en) * 1987-04-17 1988-10-26 Hitachi Ltd Virtual storage control system

Also Published As

Publication number Publication date
JPH05210593A (en) 1993-08-20
DE4234194A1 (en) 1993-04-22
FR2683061A1 (en) 1993-04-30
FR2683061B1 (en) 1995-02-17
GB2260629B (en) 1995-07-26
GB2260629A (en) 1993-04-21

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 19980806