GB909441A - Improvements relating to digital computers - Google Patents

Improvements relating to digital computers

Info

Publication number
GB909441A
GB909441A GB3819358A GB3819358A GB909441A GB 909441 A GB909441 A GB 909441A GB 3819358 A GB3819358 A GB 3819358A GB 3819358 A GB3819358 A GB 3819358A GB 909441 A GB909441 A GB 909441A
Authority
GB
United Kingdom
Prior art keywords
carry
obstructed
propagation
over
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB3819358A
Inventor
Jack Connett
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Associated Electrical Industries Ltd
Original Assignee
Associated Electrical Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Associated Electrical Industries Ltd filed Critical Associated Electrical Industries Ltd
Priority to GB3819358A priority Critical patent/GB909441A/en
Priority to FR811305A priority patent/FR1241087A/en
Publication of GB909441A publication Critical patent/GB909441A/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50Adding; Subtracting
    • G06F7/505Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination
    • G06F7/5052Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination using carry completion detection, either over all stages or at sample stages only

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Mathematical Optimization (AREA)
  • General Engineering & Computer Science (AREA)
  • Hardware Redundancy (AREA)

Abstract

909,441. Parallel-mode digital computers. ASSOCIATED ELECTRICAL INDUSTRIES Ltd. Feb. 19, 1960 [Nov. 26, 1958], No. 38193/58. Class 106 (1). In a parallel-mode digital computer, equipment is provided at one or more positions spaced along the arithmetic unit to inspect the information supplied to one or more successive digit stages, e.g. stages n to n + 3, to determine whether or not the propagation of a carry-over digit would be obstructed at the selected position ; and to vary the settling time accordingly. For addition of two numbers A, B, carry-over propagation is obstructed if corresponding digits of A and B are equivalent, and if this occurs at an inspection position one or more of signals C 1- C 4 derived from A,A, B,B will be a " 0 ", output of gate G 1 will also be " 0 " and output D will be " 1." The total possible carry-over propagation time is thus known and the settling time may be selected accordingly. Similarly for subtraction of A, B carry-over propagation is obstructed if corresponding digits of A and B are non-equivalent, and if this occurs at the inspection position one or more inputs to gate G 2 are " 0 " and again a " 1 " is obtained at D.
GB3819358A 1958-11-26 1958-11-26 Improvements relating to digital computers Expired GB909441A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
GB3819358A GB909441A (en) 1958-11-26 1958-11-26 Improvements relating to digital computers
FR811305A FR1241087A (en) 1958-11-26 1959-11-26 Improvements to arithmetic calculating machines

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB3819358A GB909441A (en) 1958-11-26 1958-11-26 Improvements relating to digital computers

Publications (1)

Publication Number Publication Date
GB909441A true GB909441A (en) 1962-10-31

Family

ID=10401857

Family Applications (1)

Application Number Title Priority Date Filing Date
GB3819358A Expired GB909441A (en) 1958-11-26 1958-11-26 Improvements relating to digital computers

Country Status (2)

Country Link
FR (1) FR1241087A (en)
GB (1) GB909441A (en)

Also Published As

Publication number Publication date
FR1241087A (en) 1960-09-09

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