GB9004179D0 - Memory arrangements - Google Patents
Memory arrangementsInfo
- Publication number
- GB9004179D0 GB9004179D0 GB909004179A GB9004179A GB9004179D0 GB 9004179 D0 GB9004179 D0 GB 9004179D0 GB 909004179 A GB909004179 A GB 909004179A GB 9004179 A GB9004179 A GB 9004179A GB 9004179 D0 GB9004179 D0 GB 9004179D0
- Authority
- GB
- United Kingdom
- Prior art keywords
- memory arrangements
- arrangements
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0646—Configuration or reconfiguration
- G06F12/0669—Configuration or reconfiguration with decentralised address assignment
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Dram (AREA)
- Coupling Device And Connection With Printed Circuit (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019890010388A KR910008413B1 (en) | 1989-07-21 | 1989-07-21 | Memory capacity expansion apparatus |
Publications (3)
Publication Number | Publication Date |
---|---|
GB9004179D0 true GB9004179D0 (en) | 1990-04-18 |
GB2234095A GB2234095A (en) | 1991-01-23 |
GB2234095B GB2234095B (en) | 1993-08-18 |
Family
ID=19288307
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB9004179A Expired - Fee Related GB2234095B (en) | 1989-07-21 | 1990-02-23 | Memory arrangements |
Country Status (2)
Country | Link |
---|---|
KR (1) | KR910008413B1 (en) |
GB (1) | GB2234095B (en) |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1461245A (en) * | 1973-01-28 | 1977-01-13 | Hawker Siddeley Dynamics Ltd | Reliability of random access memory systems |
NZ209664A (en) * | 1983-09-29 | 1987-05-29 | Tandem Computers Inc | Memory board address assignments: automatic reconfiguration |
US4888687A (en) * | 1987-05-04 | 1989-12-19 | Prime Computer, Inc. | Memory control system |
US4951248A (en) * | 1988-03-04 | 1990-08-21 | Sun Microsystems, Inc. | Self configuring memory system |
-
1989
- 1989-07-21 KR KR1019890010388A patent/KR910008413B1/en not_active IP Right Cessation
-
1990
- 1990-02-23 GB GB9004179A patent/GB2234095B/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
GB2234095B (en) | 1993-08-18 |
GB2234095A (en) | 1991-01-23 |
KR910003503A (en) | 1991-02-27 |
KR910008413B1 (en) | 1991-10-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 20090223 |